diff options
author | Supriya <ssharatkumar@nvidia.com> | 2014-06-13 03:14:27 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:14 -0400 |
commit | b7793a493a1fa292a22d5ce84c43ee342b9824b2 (patch) | |
tree | 963d128e317d319d2f53aff96420aec17b732bf6 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |
parent | c32ac10b0bba400c1e83540a20c5ca210fa48613 (diff) |
nvgpu: Host side changes to support HS mode
GM20B changes in PMU boot sequence to support booting in
HS mode and LS mode
Bug 1509680
Change-Id: I2832eda0efe17dd5e3a8f11dd06e7d4da267be70
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/423140
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 37 |
1 files changed, 25 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index b784b9a6..9b1ecea1 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -38,10 +38,8 @@ | |||
38 | #define gk20a_dbg_pmu(fmt, arg...) \ | 38 | #define gk20a_dbg_pmu(fmt, arg...) \ |
39 | gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) | 39 | gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) |
40 | 40 | ||
41 | static void pmu_dump_falcon_stats(struct pmu_gk20a *pmu); | ||
42 | static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, | 41 | static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, |
43 | u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); | 42 | u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); |
44 | static void pmu_setup_hw(struct work_struct *work); | ||
45 | static void ap_callback_init_and_enable_ctrl( | 43 | static void ap_callback_init_and_enable_ctrl( |
46 | struct gk20a *g, struct pmu_msg *msg, | 44 | struct gk20a *g, struct pmu_msg *msg, |
47 | void *param, u32 seq_desc, u32 status); | 45 | void *param, u32 seq_desc, u32 status); |
@@ -62,6 +60,10 @@ static void set_pmu_cmdline_args_cpufreq_v1(struct pmu_gk20a *pmu, u32 freq) | |||
62 | { | 60 | { |
63 | pmu->args_v1.cpu_freq_hz = freq; | 61 | pmu->args_v1.cpu_freq_hz = freq; |
64 | } | 62 | } |
63 | static void set_pmu_cmdline_args_secure_mode_v1(struct pmu_gk20a *pmu, u32 val) | ||
64 | { | ||
65 | pmu->args_v1.secure_mode = val; | ||
66 | } | ||
65 | 67 | ||
66 | static void set_pmu_cmdline_args_cpufreq_v0(struct pmu_gk20a *pmu, u32 freq) | 68 | static void set_pmu_cmdline_args_cpufreq_v0(struct pmu_gk20a *pmu, u32 freq) |
67 | { | 69 | { |
@@ -482,10 +484,12 @@ static void *get_pmu_sequence_out_alloc_ptr_v0(struct pmu_sequence *seq) | |||
482 | return (void *)(&seq->out_v0); | 484 | return (void *)(&seq->out_v0); |
483 | } | 485 | } |
484 | 486 | ||
485 | static int gk20a_init_pmu(struct pmu_gk20a *pmu) | 487 | int gk20a_init_pmu(struct pmu_gk20a *pmu) |
486 | { | 488 | { |
487 | struct gk20a *g = pmu->g; | 489 | struct gk20a *g = pmu->g; |
488 | switch (pmu->desc->app_version) { | 490 | switch (pmu->desc->app_version) { |
491 | case APP_VERSION_GM20B_1: | ||
492 | case APP_VERSION_GM20B: | ||
489 | case APP_VERSION_1: | 493 | case APP_VERSION_1: |
490 | case APP_VERSION_2: | 494 | case APP_VERSION_2: |
491 | g->ops.pmu_ver.cmd_id_zbc_table_update = 16; | 495 | g->ops.pmu_ver.cmd_id_zbc_table_update = 16; |
@@ -493,6 +497,8 @@ static int gk20a_init_pmu(struct pmu_gk20a *pmu) | |||
493 | pmu_cmdline_size_v1; | 497 | pmu_cmdline_size_v1; |
494 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq = | 498 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq = |
495 | set_pmu_cmdline_args_cpufreq_v1; | 499 | set_pmu_cmdline_args_cpufreq_v1; |
500 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode = | ||
501 | set_pmu_cmdline_args_secure_mode_v1; | ||
496 | g->ops.pmu_ver.get_pmu_cmdline_args_ptr = | 502 | g->ops.pmu_ver.get_pmu_cmdline_args_ptr = |
497 | get_pmu_cmdline_args_ptr_v1; | 503 | get_pmu_cmdline_args_ptr_v1; |
498 | g->ops.pmu_ver.get_pmu_allocation_struct_size = | 504 | g->ops.pmu_ver.get_pmu_allocation_struct_size = |
@@ -558,6 +564,8 @@ static int gk20a_init_pmu(struct pmu_gk20a *pmu) | |||
558 | pmu_cmdline_size_v0; | 564 | pmu_cmdline_size_v0; |
559 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq = | 565 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq = |
560 | set_pmu_cmdline_args_cpufreq_v0; | 566 | set_pmu_cmdline_args_cpufreq_v0; |
567 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode = | ||
568 | NULL; | ||
561 | g->ops.pmu_ver.get_pmu_cmdline_args_ptr = | 569 | g->ops.pmu_ver.get_pmu_cmdline_args_ptr = |
562 | get_pmu_cmdline_args_ptr_v0; | 570 | get_pmu_cmdline_args_ptr_v0; |
563 | g->ops.pmu_ver.get_pmu_allocation_struct_size = | 571 | g->ops.pmu_ver.get_pmu_allocation_struct_size = |
@@ -627,7 +635,7 @@ static int gk20a_init_pmu(struct pmu_gk20a *pmu) | |||
627 | return 0; | 635 | return 0; |
628 | } | 636 | } |
629 | 637 | ||
630 | static void pmu_copy_from_dmem(struct pmu_gk20a *pmu, | 638 | void pmu_copy_from_dmem(struct pmu_gk20a *pmu, |
631 | u32 src, u8 *dst, u32 size, u8 port) | 639 | u32 src, u8 *dst, u32 size, u8 port) |
632 | { | 640 | { |
633 | struct gk20a *g = pmu->g; | 641 | struct gk20a *g = pmu->g; |
@@ -673,7 +681,7 @@ static void pmu_copy_from_dmem(struct pmu_gk20a *pmu, | |||
673 | return; | 681 | return; |
674 | } | 682 | } |
675 | 683 | ||
676 | static void pmu_copy_to_dmem(struct pmu_gk20a *pmu, | 684 | void pmu_copy_to_dmem(struct pmu_gk20a *pmu, |
677 | u32 dst, u8 *src, u32 size, u8 port) | 685 | u32 dst, u8 *src, u32 size, u8 port) |
678 | { | 686 | { |
679 | struct gk20a *g = pmu->g; | 687 | struct gk20a *g = pmu->g; |
@@ -887,7 +895,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable) | |||
887 | return 0; | 895 | return 0; |
888 | } | 896 | } |
889 | 897 | ||
890 | static int pmu_reset(struct pmu_gk20a *pmu) | 898 | int pmu_reset(struct pmu_gk20a *pmu) |
891 | { | 899 | { |
892 | int err; | 900 | int err; |
893 | 901 | ||
@@ -999,7 +1007,7 @@ static int pmu_bootstrap(struct pmu_gk20a *pmu) | |||
999 | return 0; | 1007 | return 0; |
1000 | } | 1008 | } |
1001 | 1009 | ||
1002 | static void pmu_seq_init(struct pmu_gk20a *pmu) | 1010 | void pmu_seq_init(struct pmu_gk20a *pmu) |
1003 | { | 1011 | { |
1004 | u32 i; | 1012 | u32 i; |
1005 | 1013 | ||
@@ -1784,7 +1792,7 @@ static int gk20a_aelpg_init_and_enable(struct gk20a *g, u8 ctrl_id); | |||
1784 | static void pmu_setup_hw_load_zbc(struct gk20a *g); | 1792 | static void pmu_setup_hw_load_zbc(struct gk20a *g); |
1785 | static void pmu_setup_hw_enable_elpg(struct gk20a *g); | 1793 | static void pmu_setup_hw_enable_elpg(struct gk20a *g); |
1786 | 1794 | ||
1787 | static void pmu_setup_hw(struct work_struct *work) | 1795 | void pmu_setup_hw(struct work_struct *work) |
1788 | { | 1796 | { |
1789 | struct pmu_gk20a *pmu = container_of(work, struct pmu_gk20a, pg_init); | 1797 | struct pmu_gk20a *pmu = container_of(work, struct pmu_gk20a, pg_init); |
1790 | struct gk20a *g = pmu->g; | 1798 | struct gk20a *g = pmu->g; |
@@ -1967,6 +1975,12 @@ static void pmu_setup_hw_enable_elpg(struct gk20a *g) | |||
1967 | } | 1975 | } |
1968 | } | 1976 | } |
1969 | 1977 | ||
1978 | void gk20a_init_pmu_ops(struct gpu_ops *gops) | ||
1979 | { | ||
1980 | gops->pmu.pmu_setup_sw = gk20a_init_pmu_setup_sw; | ||
1981 | gops->pmu.pmu_setup_hw_and_bootstrap = gk20a_init_pmu_setup_hw1; | ||
1982 | } | ||
1983 | |||
1970 | int gk20a_init_pmu_support(struct gk20a *g) | 1984 | int gk20a_init_pmu_support(struct gk20a *g) |
1971 | { | 1985 | { |
1972 | struct pmu_gk20a *pmu = &g->pmu; | 1986 | struct pmu_gk20a *pmu = &g->pmu; |
@@ -1984,11 +1998,10 @@ int gk20a_init_pmu_support(struct gk20a *g) | |||
1984 | return err; | 1998 | return err; |
1985 | 1999 | ||
1986 | if (support_gk20a_pmu()) { | 2000 | if (support_gk20a_pmu()) { |
1987 | err = gk20a_init_pmu_setup_sw(g); | 2001 | err = g->ops.pmu.pmu_setup_sw(g); |
1988 | if (err) | 2002 | if (err) |
1989 | return err; | 2003 | return err; |
1990 | 2004 | err = g->ops.pmu.pmu_setup_hw_and_bootstrap(g); | |
1991 | err = gk20a_init_pmu_setup_hw1(g); | ||
1992 | if (err) | 2005 | if (err) |
1993 | return err; | 2006 | return err; |
1994 | } | 2007 | } |
@@ -2724,7 +2737,7 @@ static void pmu_dump_elpg_stats(struct pmu_gk20a *pmu) | |||
2724 | */ | 2737 | */ |
2725 | } | 2738 | } |
2726 | 2739 | ||
2727 | static void pmu_dump_falcon_stats(struct pmu_gk20a *pmu) | 2740 | void pmu_dump_falcon_stats(struct pmu_gk20a *pmu) |
2728 | { | 2741 | { |
2729 | struct gk20a *g = pmu->g; | 2742 | struct gk20a *g = pmu->g; |
2730 | int i; | 2743 | int i; |