gpu: nvgpu: Use nvgpu_timeout for all loops

There were still a few remaining loops where we did not use
nvgpu_timeout and required Tegra specific functions for detecting if
timeout should be skipped. Replace all of them with nvgpu_timeout and
remove including chip-id.h where possible.

FE power mode timeout loop also used wrong delay value. It always
waited for the whole max timeout instead of looping with smaller
increments.

If SEC2 ACR boot fails to halt, we should not try to check ACR result
from mailbox. Add an early return for that case.

JIRA NVGPU-16

Change-Id: I9f0984250d7d01785755338e39822e6631dcaa5a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323227

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 993cef7b..85fa8ea1 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -2374,12 +2374,11 @@ void pmu_enable_irq(struct pmu_gk20a *pmu, bool enable)
 int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
 {
         struct gk20a *g = gk20a_from_pmu(pmu);
+        struct nvgpu_timeout timeout;
 
         gk20a_dbg_fn("");
 
         if (enable) {
-                int retries = PMU_MEM_SCRUBBING_TIMEOUT_MAX /
-                              PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT;
                 g->ops.mc.enable(g, mc_enable_pwr_enabled_f());
 
                 if (g->ops.clock_gating.slcg_pmu_load_gating_prod)
@@ -2389,6 +2388,9 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
                         g->ops.clock_gating.blcg_pmu_load_gating_prod(g,
                                         g->blcg_enabled);
 
+                nvgpu_timeout_init(g, &timeout,
+                                   PMU_MEM_SCRUBBING_TIMEOUT_MAX / 1000,
+                                   NVGPU_TIMER_CPU_TIMER);
                 do {
                         u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) &
                                 (pwr_falcon_dmactl_dmem_scrubbing_m() |
@@ -2399,7 +2401,7 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
                                 return 0;
                         }
                         udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
-                } while (--retries || !tegra_platform_is_silicon());
+                } while (!nvgpu_timeout_expired(&timeout));
 
                 g->ops.mc.disable(g, mc_enable_pwr_enabled_f());
                 gk20a_err(dev_from_gk20a(g), "Falcon mem scrubbing timeout");