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authorDebarshi Dutta <ddutta@nvidia.com>2018-08-22 00:27:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-29 20:46:51 -0400
commit74639b444251d7adc222400625eb59a3d53d0c0a (patch)
tree19373fbe8ee522863c990fdfa0db24e6474f5167 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
parente3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c (diff)
gpu: nvgpu: invoke calls to methods in pmu_gk20a.h via HAL
In nvgpu repository, we have multiple accesses to methods in pmu_gk20a.h which have register accesses. Instead of directly invoking these methods, these are now called via HALs. Some common methods such as pmu_wait_message_cond which donot have any register accesses are moved to pmu_ipc.c and the method declarations are moved to pmu.h. Also, changed gm20b_pmu_dbg to nvgpu_dbg_pmu all across the code base. This would remove all indirect dependencies via gk20a.h into pmu_gk20a.h. As a result pmu_gk20a.h is now removed from gk20a.h JIRA-597 Change-Id: Id54b2684ca39362fda7626238c3116cd49e92080 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1804283 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 9ec4c867..64e4a567 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -37,6 +37,7 @@
37 37
38#include "gk20a.h" 38#include "gk20a.h"
39#include "gr_gk20a.h" 39#include "gr_gk20a.h"
40#include "pmu_gk20a.h"
40 41
41#include <nvgpu/hw/gk20a/hw_mc_gk20a.h> 42#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
42#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h> 43#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h>
@@ -137,7 +138,7 @@ u32 gk20a_pmu_get_irqdest(struct gk20a *g)
137 return intr_dest; 138 return intr_dest;
138} 139}
139 140
140void pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable) 141void gk20a_pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable)
141{ 142{
142 struct gk20a *g = gk20a_from_pmu(pmu); 143 struct gk20a *g = gk20a_from_pmu(pmu);
143 u32 intr_mask; 144 u32 intr_mask;