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authorTerje Bergstrom <tbergstrom@nvidia.com>2015-02-26 17:37:43 -0500
committerDan Willemsen <dwillemsen@nvidia.com>2015-04-04 21:59:26 -0400
commit7290a6cbd5d03145d6f1ca4c3eacba40f6d4f93c (patch)
treede452c09f5eef76af273041dc64997fdc351dbd6 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
parentbb51cf9ec6482b50f3020179965ef82f58d91a0a (diff)
gpu: nvgpu: Implement common allocator and mem_desc
Introduce mem_desc, which holds all information needed for a buffer. Implement helper functions for allocation and freeing that use this data type. Change-Id: I82c88595d058d4fb8c5c5fbf19d13269e48e422f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/712699
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c164
1 files changed, 25 insertions, 139 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index f2430165..95bb1eb6 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -146,7 +146,7 @@ static void set_pmu_cmdline_args_falctracesize_v2(
146 146
147static void set_pmu_cmdline_args_falctracedmabase_v2(struct pmu_gk20a *pmu) 147static void set_pmu_cmdline_args_falctracedmabase_v2(struct pmu_gk20a *pmu)
148{ 148{
149 pmu->args_v2.falc_trace_dma_base = ((u32)pmu->trace_buf.pmu_va)/0x100; 149 pmu->args_v2.falc_trace_dma_base = ((u32)pmu->trace_buf.gpu_va)/0x100;
150} 150}
151 151
152static void set_pmu_cmdline_args_falctracedmaidx_v2( 152static void set_pmu_cmdline_args_falctracedmaidx_v2(
@@ -177,7 +177,7 @@ static void set_pmu_cmdline_args_falctracesize_v3(
177 177
178static void set_pmu_cmdline_args_falctracedmabase_v3(struct pmu_gk20a *pmu) 178static void set_pmu_cmdline_args_falctracedmabase_v3(struct pmu_gk20a *pmu)
179{ 179{
180 pmu->args_v3.falc_trace_dma_base = ((u32)pmu->trace_buf.pmu_va)/0x100; 180 pmu->args_v3.falc_trace_dma_base = ((u32)pmu->trace_buf.gpu_va)/0x100;
181} 181}
182 182
183static void set_pmu_cmdline_args_falctracedmaidx_v3( 183static void set_pmu_cmdline_args_falctracedmaidx_v3(
@@ -218,9 +218,9 @@ static bool find_hex_in_string(char *strings, struct gk20a *g, u32 *hex_pos)
218static void printtrace(struct pmu_gk20a *pmu) 218static void printtrace(struct pmu_gk20a *pmu)
219{ 219{
220 u32 i = 0, j = 0, k, l, m, count; 220 u32 i = 0, j = 0, k, l, m, count;
221 char *trace = pmu->trace_buf.cpuva; 221 char *trace = pmu->trace_buf.cpu_va;
222 char part_str[40], buf[0x40]; 222 char part_str[40], buf[0x40];
223 u32 *trace1 = pmu->trace_buf.cpuva; 223 u32 *trace1 = pmu->trace_buf.cpu_va;
224 struct gk20a *g = gk20a_from_pmu(pmu); 224 struct gk20a *g = gk20a_from_pmu(pmu);
225 gk20a_err(dev_from_gk20a(g), "Dump pmutrace"); 225 gk20a_err(dev_from_gk20a(g), "Dump pmutrace");
226 for (i = 0; i < GK20A_PMU_TRACE_BUFSIZE; i += 0x40) { 226 for (i = 0; i < GK20A_PMU_TRACE_BUFSIZE; i += 0x40) {
@@ -249,7 +249,7 @@ static void printtrace(struct pmu_gk20a *pmu)
249 249
250static void set_pmu_cmdline_args_falctracedmabase_v1(struct pmu_gk20a *pmu) 250static void set_pmu_cmdline_args_falctracedmabase_v1(struct pmu_gk20a *pmu)
251{ 251{
252 pmu->args_v1.falc_trace_dma_base = ((u32)pmu->trace_buf.pmu_va)/0x100; 252 pmu->args_v1.falc_trace_dma_base = ((u32)pmu->trace_buf.gpu_va)/0x100;
253} 253}
254 254
255static void set_pmu_cmdline_args_falctracedmaidx_v1( 255static void set_pmu_cmdline_args_falctracedmaidx_v1(
@@ -1349,7 +1349,7 @@ static int pmu_bootstrap(struct pmu_gk20a *pmu)
1349 pwr_falcon_itfen_ctxen_enable_f()); 1349 pwr_falcon_itfen_ctxen_enable_f());
1350 gk20a_writel(g, pwr_pmu_new_instblk_r(), 1350 gk20a_writel(g, pwr_pmu_new_instblk_r(),
1351 pwr_pmu_new_instblk_ptr_f( 1351 pwr_pmu_new_instblk_ptr_f(
1352 mm->pmu.inst_block.cpu_pa >> 12) | 1352 sg_phys(mm->pmu.inst_block.sgt->sgl) >> 12) |
1353 pwr_pmu_new_instblk_valid_f(1) | 1353 pwr_pmu_new_instblk_valid_f(1) |
1354 pwr_pmu_new_instblk_target_sys_coh_f()); 1354 pwr_pmu_new_instblk_target_sys_coh_f());
1355 1355
@@ -1377,13 +1377,13 @@ static int pmu_bootstrap(struct pmu_gk20a *pmu)
1377 pwr_falcon_dmemc_blk_f(0) | 1377 pwr_falcon_dmemc_blk_f(0) |
1378 pwr_falcon_dmemc_aincw_f(1)); 1378 pwr_falcon_dmemc_aincw_f(1));
1379 1379
1380 addr_code = u64_lo32((pmu->ucode.pmu_va + 1380 addr_code = u64_lo32((pmu->ucode.gpu_va +
1381 desc->app_start_offset + 1381 desc->app_start_offset +
1382 desc->app_resident_code_offset) >> 8) ; 1382 desc->app_resident_code_offset) >> 8) ;
1383 addr_data = u64_lo32((pmu->ucode.pmu_va + 1383 addr_data = u64_lo32((pmu->ucode.gpu_va +
1384 desc->app_start_offset + 1384 desc->app_start_offset +
1385 desc->app_resident_data_offset) >> 8); 1385 desc->app_resident_data_offset) >> 8);
1386 addr_load = u64_lo32((pmu->ucode.pmu_va + 1386 addr_load = u64_lo32((pmu->ucode.gpu_va +
1387 desc->bootloader_start_offset) >> 8); 1387 desc->bootloader_start_offset) >> 8);
1388 1388
1389 gk20a_writel(g, pwr_falcon_dmemd_r(0), GK20A_PMU_DMAIDX_UCODE); 1389 gk20a_writel(g, pwr_falcon_dmemd_r(0), GK20A_PMU_DMAIDX_UCODE);
@@ -1942,13 +1942,10 @@ static int gk20a_prepare_ucode(struct gk20a *g)
1942{ 1942{
1943 struct pmu_gk20a *pmu = &g->pmu; 1943 struct pmu_gk20a *pmu = &g->pmu;
1944 int i, err = 0; 1944 int i, err = 0;
1945 struct sg_table *sgt_pmu_ucode;
1946 dma_addr_t iova;
1947 struct device *d = dev_from_gk20a(g); 1945 struct device *d = dev_from_gk20a(g);
1948 struct mm_gk20a *mm = &g->mm; 1946 struct mm_gk20a *mm = &g->mm;
1949 struct vm_gk20a *vm = &mm->pmu.vm; 1947 struct vm_gk20a *vm = &mm->pmu.vm;
1950 void *ucode_ptr; 1948 void *ucode_ptr;
1951 DEFINE_DMA_ATTRS(attrs);
1952 1949
1953 if (g->pmu_fw) { 1950 if (g->pmu_fw) {
1954 gk20a_init_pmu(pmu); 1951 gk20a_init_pmu(pmu);
@@ -1967,56 +1964,21 @@ static int gk20a_prepare_ucode(struct gk20a *g)
1967 pmu->ucode_image = (u32 *)((u8 *)pmu->desc + 1964 pmu->ucode_image = (u32 *)((u8 *)pmu->desc +
1968 pmu->desc->descriptor_size); 1965 pmu->desc->descriptor_size);
1969 1966
1970 dma_set_attr(DMA_ATTR_READ_ONLY, &attrs); 1967 err = gk20a_gmmu_alloc_map_attr(vm, DMA_ATTR_READ_ONLY,
1971 pmu->ucode.cpuva = dma_alloc_attrs(d, GK20A_PMU_UCODE_SIZE_MAX, 1968 GK20A_PMU_UCODE_SIZE_MAX, &pmu->ucode);
1972 &iova, 1969 if (err)
1973 GFP_KERNEL,
1974 &attrs);
1975 if (!pmu->ucode.cpuva) {
1976 gk20a_err(d, "failed to allocate memory\n");
1977 err = -ENOMEM;
1978 goto err_release_fw; 1970 goto err_release_fw;
1979 }
1980
1981 pmu->ucode.iova = iova;
1982
1983 err = gk20a_get_sgtable(d, &sgt_pmu_ucode,
1984 pmu->ucode.cpuva,
1985 pmu->ucode.iova,
1986 GK20A_PMU_UCODE_SIZE_MAX);
1987 if (err) {
1988 gk20a_err(d, "failed to allocate sg table\n");
1989 goto err_free_pmu_ucode;
1990 }
1991 1971
1992 pmu->ucode.pmu_va = gk20a_gmmu_map(vm, &sgt_pmu_ucode, 1972 ucode_ptr = pmu->ucode.cpu_va;
1993 GK20A_PMU_UCODE_SIZE_MAX,
1994 0, /* flags */
1995 gk20a_mem_flag_read_only);
1996 if (!pmu->ucode.pmu_va) {
1997 gk20a_err(d, "failed to map pmu ucode memory!!");
1998 goto err_free_ucode_sgt;
1999 }
2000
2001 ucode_ptr = pmu->ucode.cpuva;
2002 1973
2003 for (i = 0; i < (pmu->desc->app_start_offset + 1974 for (i = 0; i < (pmu->desc->app_start_offset +
2004 pmu->desc->app_size) >> 2; i++) 1975 pmu->desc->app_size) >> 2; i++)
2005 gk20a_mem_wr32(ucode_ptr, i, pmu->ucode_image[i]); 1976 gk20a_mem_wr32(ucode_ptr, i, pmu->ucode_image[i]);
2006 1977
2007 gk20a_free_sgtable(&sgt_pmu_ucode);
2008
2009 gk20a_init_pmu(pmu); 1978 gk20a_init_pmu(pmu);
2010 1979
2011 return 0; 1980 return 0;
2012 1981
2013 err_free_ucode_sgt:
2014 gk20a_free_sgtable(&sgt_pmu_ucode);
2015 err_free_pmu_ucode:
2016 dma_free_attrs(d, GK20A_PMU_UCODE_SIZE_MAX,
2017 pmu->ucode.cpuva, pmu->ucode.iova, &attrs);
2018 pmu->ucode.cpuva = NULL;
2019 pmu->ucode.iova = 0;
2020 err_release_fw: 1982 err_release_fw:
2021 release_firmware(g->pmu_fw); 1983 release_firmware(g->pmu_fw);
2022 1984
@@ -2031,9 +1993,6 @@ static int gk20a_init_pmu_setup_sw(struct gk20a *g)
2031 struct device *d = dev_from_gk20a(g); 1993 struct device *d = dev_from_gk20a(g);
2032 int i, err = 0; 1994 int i, err = 0;
2033 u8 *ptr; 1995 u8 *ptr;
2034 struct sg_table *sgt_seq_buf;
2035 struct sg_table *sgt_pmu_buf;
2036 dma_addr_t iova;
2037 1996
2038 gk20a_dbg_fn(""); 1997 gk20a_dbg_fn("");
2039 1998
@@ -2082,70 +2041,19 @@ static int gk20a_init_pmu_setup_sw(struct gk20a *g)
2082 2041
2083 INIT_WORK(&pmu->pg_init, pmu_setup_hw); 2042 INIT_WORK(&pmu->pg_init, pmu_setup_hw);
2084 2043
2085 pmu->seq_buf.cpuva = dma_alloc_coherent(d, GK20A_PMU_SEQ_BUF_SIZE, 2044 err = gk20a_gmmu_alloc_map(vm, GK20A_PMU_SEQ_BUF_SIZE, &pmu->seq_buf);
2086 &iova, 2045 if (err) {
2087 GFP_KERNEL);
2088 if (!pmu->seq_buf.cpuva) {
2089 gk20a_err(d, "failed to allocate memory\n"); 2046 gk20a_err(d, "failed to allocate memory\n");
2090 err = -ENOMEM;
2091 goto err_free_seq; 2047 goto err_free_seq;
2092 } 2048 }
2093 2049
2094 pmu->seq_buf.iova = iova; 2050 err = gk20a_gmmu_alloc_map(vm, GK20A_PMU_TRACE_BUFSIZE, &pmu->trace_buf);
2095 2051 if (err) {
2096 pmu->trace_buf.cpuva = dma_alloc_coherent(d, GK20A_PMU_TRACE_BUFSIZE,
2097 &iova,
2098 GFP_KERNEL);
2099 if (!pmu->trace_buf.cpuva) {
2100 gk20a_err(d, "failed to allocate trace memory\n"); 2052 gk20a_err(d, "failed to allocate trace memory\n");
2101 err = -ENOMEM;
2102 goto err_free_seq_buf; 2053 goto err_free_seq_buf;
2103 } 2054 }
2104 pmu->trace_buf.iova = iova;
2105 2055
2106 err = gk20a_get_sgtable(d, &sgt_seq_buf, 2056 ptr = (u8 *)pmu->seq_buf.cpu_va;
2107 pmu->seq_buf.cpuva,
2108 pmu->seq_buf.iova,
2109 GK20A_PMU_SEQ_BUF_SIZE);
2110 if (err) {
2111 gk20a_err(d, "failed to allocate seq buf sg table\n");
2112 goto err_free_trace_buf;
2113 }
2114
2115 pmu->seq_buf.pmu_va = gk20a_gmmu_map(vm, &sgt_seq_buf,
2116 GK20A_PMU_SEQ_BUF_SIZE,
2117 0, /* flags */
2118 gk20a_mem_flag_none);
2119 if (!pmu->seq_buf.pmu_va) {
2120 gk20a_err(d, "failed to gmmu map seq buf memory!!");
2121 err = -ENOMEM;
2122 goto err_free_seq_buf_sgt;
2123 }
2124
2125 err = gk20a_get_sgtable(d, &sgt_pmu_buf,
2126 pmu->trace_buf.cpuva,
2127 pmu->trace_buf.iova,
2128 GK20A_PMU_TRACE_BUFSIZE);
2129 if (err) {
2130 gk20a_err(d, "failed to allocate sg table for Trace\n");
2131 goto err_unmap_seq_buf;
2132 }
2133
2134 pmu->trace_buf.pmu_va = gk20a_gmmu_map(vm, &sgt_pmu_buf,
2135 GK20A_PMU_TRACE_BUFSIZE,
2136 0, /* flags */
2137 gk20a_mem_flag_none);
2138 if (!pmu->trace_buf.pmu_va) {
2139 gk20a_err(d, "failed to gmmu map pmu trace memory!!");
2140 err = -ENOMEM;
2141 goto err_free_trace_buf_sgt;
2142 }
2143
2144 ptr = (u8 *)pmu->seq_buf.cpuva;
2145 if (!ptr) {
2146 gk20a_err(d, "failed to map cpu ptr for zbc buffer");
2147 goto err_unmap_trace_buf;
2148 }
2149 2057
2150 /* TBD: remove this if ZBC save/restore is handled by PMU 2058 /* TBD: remove this if ZBC save/restore is handled by PMU
2151 * end an empty ZBC sequence for now */ 2059 * end an empty ZBC sequence for now */
@@ -2155,35 +2063,13 @@ static int gk20a_init_pmu_setup_sw(struct gk20a *g)
2155 2063
2156 pmu->seq_buf.size = GK20A_PMU_SEQ_BUF_SIZE; 2064 pmu->seq_buf.size = GK20A_PMU_SEQ_BUF_SIZE;
2157 2065
2158 gk20a_free_sgtable(&sgt_seq_buf);
2159 gk20a_free_sgtable(&sgt_pmu_buf);
2160
2161 pmu->sw_ready = true; 2066 pmu->sw_ready = true;
2162 2067
2163skip_init: 2068skip_init:
2164 gk20a_dbg_fn("done"); 2069 gk20a_dbg_fn("done");
2165 return 0; 2070 return 0;
2166 err_unmap_trace_buf:
2167 gk20a_gmmu_unmap(vm, pmu->trace_buf.pmu_va,
2168 GK20A_PMU_TRACE_BUFSIZE, gk20a_mem_flag_none);
2169 err_free_trace_buf_sgt:
2170 gk20a_free_sgtable(&sgt_pmu_buf);
2171 err_unmap_seq_buf:
2172 gk20a_gmmu_unmap(vm, pmu->seq_buf.pmu_va,
2173 GK20A_PMU_SEQ_BUF_SIZE, gk20a_mem_flag_none);
2174 err_free_seq_buf_sgt:
2175 gk20a_free_sgtable(&sgt_seq_buf);
2176 err_free_trace_buf:
2177 dma_free_coherent(d, GK20A_PMU_TRACE_BUFSIZE,
2178 pmu->trace_buf.cpuva, pmu->trace_buf.iova);
2179 pmu->trace_buf.cpuva = NULL;
2180 pmu->trace_buf.iova = 0;
2181
2182 err_free_seq_buf: 2071 err_free_seq_buf:
2183 dma_free_coherent(d, GK20A_PMU_SEQ_BUF_SIZE, 2072 gk20a_gmmu_unmap_free(vm, &pmu->seq_buf);
2184 pmu->seq_buf.cpuva, pmu->seq_buf.iova);
2185 pmu->seq_buf.cpuva = NULL;
2186 pmu->seq_buf.iova = 0;
2187 err_free_seq: 2073 err_free_seq:
2188 kfree(pmu->seq); 2074 kfree(pmu->seq);
2189 err_free_mutex: 2075 err_free_mutex:
@@ -2306,8 +2192,8 @@ int gk20a_init_pmu_bind_fecs(struct gk20a *g)
2306 cmd.cmd.pg.eng_buf_load.engine_id = ENGINE_GR_GK20A; 2192 cmd.cmd.pg.eng_buf_load.engine_id = ENGINE_GR_GK20A;
2307 cmd.cmd.pg.eng_buf_load.buf_idx = PMU_PGENG_GR_BUFFER_IDX_FECS; 2193 cmd.cmd.pg.eng_buf_load.buf_idx = PMU_PGENG_GR_BUFFER_IDX_FECS;
2308 cmd.cmd.pg.eng_buf_load.buf_size = pmu->pg_buf.size; 2194 cmd.cmd.pg.eng_buf_load.buf_size = pmu->pg_buf.size;
2309 cmd.cmd.pg.eng_buf_load.dma_base = u64_lo32(pmu->pg_buf.pmu_va >> 8); 2195 cmd.cmd.pg.eng_buf_load.dma_base = u64_lo32(pmu->pg_buf.gpu_va >> 8);
2310 cmd.cmd.pg.eng_buf_load.dma_offset = (u8)(pmu->pg_buf.pmu_va & 0xFF); 2196 cmd.cmd.pg.eng_buf_load.dma_offset = (u8)(pmu->pg_buf.gpu_va & 0xFF);
2311 cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; 2197 cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT;
2312 2198
2313 pmu->buf_loaded = false; 2199 pmu->buf_loaded = false;
@@ -2331,8 +2217,8 @@ static void pmu_setup_hw_load_zbc(struct gk20a *g)
2331 cmd.cmd.pg.eng_buf_load.engine_id = ENGINE_GR_GK20A; 2217 cmd.cmd.pg.eng_buf_load.engine_id = ENGINE_GR_GK20A;
2332 cmd.cmd.pg.eng_buf_load.buf_idx = PMU_PGENG_GR_BUFFER_IDX_ZBC; 2218 cmd.cmd.pg.eng_buf_load.buf_idx = PMU_PGENG_GR_BUFFER_IDX_ZBC;
2333 cmd.cmd.pg.eng_buf_load.buf_size = pmu->seq_buf.size; 2219 cmd.cmd.pg.eng_buf_load.buf_size = pmu->seq_buf.size;
2334 cmd.cmd.pg.eng_buf_load.dma_base = u64_lo32(pmu->seq_buf.pmu_va >> 8); 2220 cmd.cmd.pg.eng_buf_load.dma_base = u64_lo32(pmu->seq_buf.gpu_va >> 8);
2335 cmd.cmd.pg.eng_buf_load.dma_offset = (u8)(pmu->seq_buf.pmu_va & 0xFF); 2221 cmd.cmd.pg.eng_buf_load.dma_offset = (u8)(pmu->seq_buf.gpu_va & 0xFF);
2336 cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; 2222 cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT;
2337 2223
2338 pmu->buf_loaded = false; 2224 pmu->buf_loaded = false;
@@ -4100,9 +3986,9 @@ static int falc_trace_show(struct seq_file *s, void *data)
4100 struct gk20a *g = s->private; 3986 struct gk20a *g = s->private;
4101 struct pmu_gk20a *pmu = &g->pmu; 3987 struct pmu_gk20a *pmu = &g->pmu;
4102 u32 i = 0, j = 0, k, l, m; 3988 u32 i = 0, j = 0, k, l, m;
4103 char *trace = pmu->trace_buf.cpuva; 3989 char *trace = pmu->trace_buf.cpu_va;
4104 char part_str[40]; 3990 char part_str[40];
4105 u32 *trace1 = pmu->trace_buf.cpuva; 3991 u32 *trace1 = pmu->trace_buf.cpu_va;
4106 for (i = 0; i < GK20A_PMU_TRACE_BUFSIZE; i += 0x40) { 3992 for (i = 0; i < GK20A_PMU_TRACE_BUFSIZE; i += 0x40) {
4107 for (j = 0; j < 0x40; j++) 3993 for (j = 0; j < 0x40; j++)
4108 if (trace1[(i / 4) + j]) 3994 if (trace1[(i / 4) + j])