diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2014-06-12 06:46:15 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:22 -0400 |
commit | 6dc277b783bca9170c43c725884878ba63ce64da (patch) | |
tree | 0ddfba648ff4cce95ec9a28dc297e42ccd73df9b /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |
parent | 0f9bf924b2be88502c9920ace258c27e0172e3d5 (diff) |
gpu:nvgpu:sysfs node to update aelpg parameter
Added sysfs node to update aelpg parameter.
Pass parameter as below sequence,
SAMPLING_PERIOD_PG_DEFAULT_US, MINIMUM_IDLE_FILTER_DEFAULT_US,
MINIMUM_TARGET_SAVING_DEFAULT_US, POWER_BREAKEVEN_DEFAULT_US,
CYCLES_PER_SAMPLE_MAX_DEFAULT
Bug 1464737
Change-Id: I46873c463820f30f190c722d7ed038622cb2710f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/422702
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 808bf015..a5b9f05f 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -43,8 +43,6 @@ static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, | |||
43 | static void ap_callback_init_and_enable_ctrl( | 43 | static void ap_callback_init_and_enable_ctrl( |
44 | struct gk20a *g, struct pmu_msg *msg, | 44 | struct gk20a *g, struct pmu_msg *msg, |
45 | void *param, u32 seq_desc, u32 status); | 45 | void *param, u32 seq_desc, u32 status); |
46 | static int gk20a_pmu_ap_send_command(struct gk20a *g, | ||
47 | union pmu_ap_cmd *p_ap_cmd, bool b_block); | ||
48 | 46 | ||
49 | static u32 pmu_cmdline_size_v0(struct pmu_gk20a *pmu) | 47 | static u32 pmu_cmdline_size_v0(struct pmu_gk20a *pmu) |
50 | { | 48 | { |
@@ -1803,9 +1801,6 @@ int gk20a_init_pmu_setup_hw1(struct gk20a *g) | |||
1803 | 1801 | ||
1804 | } | 1802 | } |
1805 | 1803 | ||
1806 | static int gk20a_aelpg_init(struct gk20a *g); | ||
1807 | static int gk20a_aelpg_init_and_enable(struct gk20a *g, u8 ctrl_id); | ||
1808 | |||
1809 | static void pmu_setup_hw_load_zbc(struct gk20a *g); | 1804 | static void pmu_setup_hw_load_zbc(struct gk20a *g); |
1810 | static void pmu_setup_hw_enable_elpg(struct gk20a *g); | 1805 | static void pmu_setup_hw_enable_elpg(struct gk20a *g); |
1811 | 1806 | ||
@@ -3441,7 +3436,7 @@ static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, | |||
3441 | } | 3436 | } |
3442 | 3437 | ||
3443 | /* Send an Adaptive Power (AP) related command to PMU */ | 3438 | /* Send an Adaptive Power (AP) related command to PMU */ |
3444 | static int gk20a_pmu_ap_send_command(struct gk20a *g, | 3439 | int gk20a_pmu_ap_send_command(struct gk20a *g, |
3445 | union pmu_ap_cmd *p_ap_cmd, bool b_block) | 3440 | union pmu_ap_cmd *p_ap_cmd, bool b_block) |
3446 | { | 3441 | { |
3447 | struct pmu_gk20a *pmu = &g->pmu; | 3442 | struct pmu_gk20a *pmu = &g->pmu; |
@@ -3545,7 +3540,7 @@ static void ap_callback_init_and_enable_ctrl( | |||
3545 | } | 3540 | } |
3546 | } | 3541 | } |
3547 | 3542 | ||
3548 | static int gk20a_aelpg_init(struct gk20a *g) | 3543 | int gk20a_aelpg_init(struct gk20a *g) |
3549 | { | 3544 | { |
3550 | int status = 0; | 3545 | int status = 0; |
3551 | 3546 | ||
@@ -3554,30 +3549,28 @@ static int gk20a_aelpg_init(struct gk20a *g) | |||
3554 | 3549 | ||
3555 | /* TODO: Check for elpg being ready? */ | 3550 | /* TODO: Check for elpg being ready? */ |
3556 | ap_cmd.init.cmd_id = PMU_AP_CMD_ID_INIT; | 3551 | ap_cmd.init.cmd_id = PMU_AP_CMD_ID_INIT; |
3557 | ap_cmd.init.pg_sampling_period_us = | 3552 | ap_cmd.init.pg_sampling_period_us = g->pmu.aelpg_param[0]; |
3558 | APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US; | ||
3559 | 3553 | ||
3560 | status = gk20a_pmu_ap_send_command(g, &ap_cmd, false); | 3554 | status = gk20a_pmu_ap_send_command(g, &ap_cmd, false); |
3561 | return status; | 3555 | return status; |
3562 | } | 3556 | } |
3563 | 3557 | ||
3564 | static int gk20a_aelpg_init_and_enable(struct gk20a *g, u8 ctrl_id) | 3558 | int gk20a_aelpg_init_and_enable(struct gk20a *g, u8 ctrl_id) |
3565 | { | 3559 | { |
3566 | int status = 0; | 3560 | int status = 0; |
3567 | union pmu_ap_cmd ap_cmd; | 3561 | union pmu_ap_cmd ap_cmd; |
3568 | 3562 | ||
3569 | /* TODO: Probably check if ELPG is ready? */ | 3563 | /* TODO: Probably check if ELPG is ready? */ |
3570 | |||
3571 | ap_cmd.init_and_enable_ctrl.cmd_id = PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL; | 3564 | ap_cmd.init_and_enable_ctrl.cmd_id = PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL; |
3572 | ap_cmd.init_and_enable_ctrl.ctrl_id = ctrl_id; | 3565 | ap_cmd.init_and_enable_ctrl.ctrl_id = ctrl_id; |
3573 | ap_cmd.init_and_enable_ctrl.params.min_idle_filter_us = | 3566 | ap_cmd.init_and_enable_ctrl.params.min_idle_filter_us = |
3574 | APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US; | 3567 | g->pmu.aelpg_param[1]; |
3575 | ap_cmd.init_and_enable_ctrl.params.min_target_saving_us = | 3568 | ap_cmd.init_and_enable_ctrl.params.min_target_saving_us = |
3576 | APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US; | 3569 | g->pmu.aelpg_param[2]; |
3577 | ap_cmd.init_and_enable_ctrl.params.power_break_even_us = | 3570 | ap_cmd.init_and_enable_ctrl.params.power_break_even_us = |
3578 | APCTRL_POWER_BREAKEVEN_DEFAULT_US; | 3571 | g->pmu.aelpg_param[3]; |
3579 | ap_cmd.init_and_enable_ctrl.params.cycles_per_sample_max = | 3572 | ap_cmd.init_and_enable_ctrl.params.cycles_per_sample_max = |
3580 | APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT; | 3573 | g->pmu.aelpg_param[4]; |
3581 | 3574 | ||
3582 | switch (ctrl_id) { | 3575 | switch (ctrl_id) { |
3583 | case PMU_AP_CTRL_ID_GRAPHICS: | 3576 | case PMU_AP_CTRL_ID_GRAPHICS: |