gpu: nvgpu: fix pmu msg and command queue init

Offset needs to be calculated for individual queues
from init ack content

Bug 200229814

Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Change-Id: I93276b9cbab48e7fc42fb6c2a8edf382afb82f71
Reviewed-on: http://git-master/r/1202291
(cherry picked from commit 0e0abd478a13a5163e2b83d07307ed7136c4920e)
Reviewed-on: http://git-master/r/1205442
(cherry picked from commit f402cc2a9d0be05b5b95d5d0acbfc66f3b78b309)
Reviewed-on: http://git-master/r/1222683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 13 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index a2609dbb..f64aa608 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -1148,10 +1148,15 @@ static void get_pmu_init_msg_pmu_queue_params_v3(struct pmu_queue *queue,
 {
         struct pmu_init_msg_pmu_v3 *init =
                 (struct pmu_init_msg_pmu_v3 *)pmu_init_msg;
-
+        u32 current_ptr = 0;
+        u8 i;
         queue->index    = init->queue_index[id];
-        queue->offset   = init->queue_offset;
         queue->size = init->queue_size[id];
+        if (id != 0) {
+          for ( i = 0 ; i < id; i++)
+            current_ptr += init->queue_size[i];
+        }
+        queue->offset   = init->queue_offset + current_ptr;
 }
 
 static void *get_pmu_sequence_in_alloc_ptr_v3(struct pmu_sequence *seq)
@@ -2493,6 +2498,7 @@ static int pmu_queue_tail(struct pmu_gk20a *pmu, struct pmu_queue *queue,
                         gk20a_writel(g,
                                 pwr_pmu_queue_tail_r(queue->index),
                                 pwr_pmu_queue_tail_address_f(*tail));
+
         } else {
                 if (!set)
                         *tail = pwr_pmu_msgq_tail_val_v(
@@ -2681,14 +2687,14 @@ static bool pmu_queue_is_empty(struct pmu_gk20a *pmu,
 static bool pmu_queue_has_room(struct pmu_gk20a *pmu,
                         struct pmu_queue *queue, u32 size, bool *need_rewind)
 {
-        u32 head, tail, free;
+        u32 head, tail;
         bool rewind = false;
+        int free;
 
         size = ALIGN(size, QUEUE_ALIGNMENT);
 
         pmu_queue_head(pmu, queue, &head, QUEUE_GET);
         pmu_queue_tail(pmu, queue, &tail, QUEUE_GET);
-
         if (head >= tail) {
                 free = queue->offset + queue->size - head;
                 free -= PMU_CMD_HDR_SIZE;
@@ -2711,6 +2717,7 @@ static bool pmu_queue_has_room(struct pmu_gk20a *pmu,
 static int pmu_queue_push(struct pmu_gk20a *pmu,
                         struct pmu_queue *queue, void *data, u32 size)
 {
+
         gk20a_dbg_fn("");
 
         if (!queue->opened && queue->oflag == OFLAG_WRITE){
@@ -3570,7 +3577,6 @@ static int pmu_process_init_msg(struct pmu_gk20a *pmu,
 
         pmu_copy_from_dmem(pmu, tail,
                 (u8 *)&msg->hdr, PMU_MSG_HDR_SIZE, 0);
-
         if (msg->hdr.unit_id != PMU_UNIT_INIT) {
                 gk20a_err(dev_from_gk20a(g),
                         "expecting init msg");
@@ -4359,6 +4365,7 @@ static int pmu_write_cmd(struct pmu_gk20a *pmu, struct pmu_cmd *cmd,
 
         queue = &pmu->queue[queue_id];
 
+
         do {
                 err = pmu_queue_open_write(pmu, queue, cmd->hdr.size);
                 if (err == -EAGAIN && time_before(jiffies, end_jiffies))
@@ -4372,6 +4379,7 @@ static int pmu_write_cmd(struct pmu_gk20a *pmu, struct pmu_cmd *cmd,
 
         pmu_queue_push(pmu, queue, cmd, cmd->hdr.size);
 
+
         err = pmu_queue_close(pmu, queue, true);
 
 clean_up: