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authorAlex Waterman <alexw@nvidia.com>2017-10-06 14:30:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-24 18:16:49 -0400
commit2a285d0607a20694476399f5719e74dbc26fcd58 (patch)
treeef0246e3ca7b933ce3ea4c74061f61cc2e394b8b /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
parent748331cbab1c7af26ab1fbae5ead2cdaff22806a (diff)
gpu: nvgpu: Cleanup generic MM code in gk20a/mm_gk20a.c
Move much of the remaining generic MM code to a new common location: common/mm/mm.c. Also add a corresponding <nvgpu/mm.h> header. This mostly consists of init and cleanup code to handle the common MM data structures like the VIDMEM code, address spaces for various engines, etc. A few more indepth changes were made as well. 1. alloc_inst_block() has been added to the MM HAL. This used to be defined directly in the gk20a code but it used a register. As a result, if this register hypothetically changes in the future, it would need to become a HAL anyway. This path preempts that and for now just defines all HALs to use the gk20a version. 2. Rename as much as possible: global functions are, for the most part, prepended with nvgpu (there are a few exceptions which I have yet to decide what to do with). Functions that are static are renamed to be as consistent with their functionality as possible since in some cases function effect and function name have diverged. JIRA NVGPU-30 Change-Id: Ic948f1ecc2f7976eba4bb7169a44b7226bb7c0b5 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1574499 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index e4dd6a59..2b954e1a 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -30,6 +30,7 @@
30#include <nvgpu/bug.h> 30#include <nvgpu/bug.h>
31#include <nvgpu/firmware.h> 31#include <nvgpu/firmware.h>
32#include <nvgpu/falcon.h> 32#include <nvgpu/falcon.h>
33#include <nvgpu/mm.h>
33 34
34#include "gk20a.h" 35#include "gk20a.h"
35#include "gr_gk20a.h" 36#include "gr_gk20a.h"
@@ -181,7 +182,7 @@ int pmu_bootstrap(struct nvgpu_pmu *pmu)
181 pwr_falcon_itfen_ctxen_enable_f()); 182 pwr_falcon_itfen_ctxen_enable_f());
182 gk20a_writel(g, pwr_pmu_new_instblk_r(), 183 gk20a_writel(g, pwr_pmu_new_instblk_r(),
183 pwr_pmu_new_instblk_ptr_f( 184 pwr_pmu_new_instblk_ptr_f(
184 gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | 185 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
185 pwr_pmu_new_instblk_valid_f(1) | 186 pwr_pmu_new_instblk_valid_f(1) |
186 pwr_pmu_new_instblk_target_sys_coh_f()); 187 pwr_pmu_new_instblk_target_sys_coh_f());
187 188