gpu: nvgpu: Update PMU firmware version.

This patch also updates PMU cmdline args as
required by updated firmware.

GPUT19x-30

Change-Id: I44214007046081a44acc7284eb2854d0548a8da8
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1498188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index f296b57c..4e416f67 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -205,6 +205,11 @@ static u32 pmu_cmdline_size_v5(struct nvgpu_pmu *pmu)
         return sizeof(struct pmu_cmdline_args_v5);
 }
 
+static u32 pmu_cmdline_size_v6(struct nvgpu_pmu *pmu)
+{
+        return sizeof(struct pmu_cmdline_args_v6);
+}
+
 static void set_pmu_cmdline_args_cpufreq_v5(struct nvgpu_pmu *pmu, u32 freq)
 {
         pmu->args_v5.cpu_freq_hz = 204000000;
@@ -1586,7 +1591,7 @@ int gk20a_init_pmu(struct nvgpu_pmu *pmu)
                 g->ops.pmu_ver.cmd_id_zbc_table_update = 16;
                 g->ops.pmu_ver.is_pmu_zbc_save_supported = false;
                 g->ops.pmu_ver.get_pmu_cmdline_args_size =
-                        pmu_cmdline_size_v5;
+                        pmu_cmdline_size_v6;
                 g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq =
                         set_pmu_cmdline_args_cpufreq_v5;
                 g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode =