diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-04-20 17:08:26 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-21 02:11:31 -0400 |
commit | 13bebeced17c206995bd17c573d094968cc0fbca (patch) | |
tree | 3892a00b5d083ad96dbe2ddbf7a9386c14afe660 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |
parent | e32f62fadfcde413bcd9b5af61ad884e27ba2bf1 (diff) |
gpu: nvgpu: Use retry timer for short delays
CPU timer is inaccurate for short delays, and can produce false
timeouts.
Bug 1903521
Change-Id: I688b5a59489b62cbd59e418d641fd188ecd3b7e0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1467002
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 257d9f7c..229d5b4f 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -41,7 +41,7 @@ | |||
41 | 41 | ||
42 | #define GK20A_PMU_UCODE_IMAGE "gpmu_ucode.bin" | 42 | #define GK20A_PMU_UCODE_IMAGE "gpmu_ucode.bin" |
43 | 43 | ||
44 | #define PMU_MEM_SCRUBBING_TIMEOUT_MAX 2000 | 44 | #define PMU_MEM_SCRUBBING_TIMEOUT_MAX 1000 |
45 | #define PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 | 45 | #define PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 |
46 | 46 | ||
47 | #define gk20a_dbg_pmu(fmt, arg...) \ | 47 | #define gk20a_dbg_pmu(fmt, arg...) \ |
@@ -2315,7 +2315,7 @@ int pmu_idle(struct pmu_gk20a *pmu) | |||
2315 | struct nvgpu_timeout timeout; | 2315 | struct nvgpu_timeout timeout; |
2316 | u32 idle_stat; | 2316 | u32 idle_stat; |
2317 | 2317 | ||
2318 | nvgpu_timeout_init(g, &timeout, 2000, NVGPU_TIMER_CPU_TIMER); | 2318 | nvgpu_timeout_init(g, &timeout, 2000, NVGPU_TIMER_RETRY_TIMER); |
2319 | 2319 | ||
2320 | /* wait for pmu idle */ | 2320 | /* wait for pmu idle */ |
2321 | do { | 2321 | do { |
@@ -2418,8 +2418,9 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) | |||
2418 | g->blcg_enabled); | 2418 | g->blcg_enabled); |
2419 | 2419 | ||
2420 | nvgpu_timeout_init(g, &timeout, | 2420 | nvgpu_timeout_init(g, &timeout, |
2421 | PMU_MEM_SCRUBBING_TIMEOUT_MAX / 1000, | 2421 | PMU_MEM_SCRUBBING_TIMEOUT_MAX / |
2422 | NVGPU_TIMER_CPU_TIMER); | 2422 | PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT, |
2423 | NVGPU_TIMER_RETRY_TIMER); | ||
2423 | do { | 2424 | do { |
2424 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & | 2425 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & |
2425 | (pwr_falcon_dmactl_dmem_scrubbing_m() | | 2426 | (pwr_falcon_dmactl_dmem_scrubbing_m() | |