diff options
author | Vijayakumar Subbu <vsubbu@nvidia.com> | 2016-07-28 01:29:15 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-09-29 16:17:46 -0400 |
commit | b17d9708c9e9930778de43de1edf1385acb13ebd (patch) | |
tree | fc485e96cc19575d463c61c8b80a09dd89745f3f /drivers/gpu/nvgpu/gk20a/pmu_common.h | |
parent | 27b47b1969d7d9cdd3de9fd6f0131ad357f4b0fa (diff) |
gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-45
Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205849
(cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126)
Reviewed-on: http://git-master/r/1227256
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_common.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_common.h | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_common.h b/drivers/gpu/nvgpu/gk20a/pmu_common.h index 76b37cf7..de37caeb 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_common.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_common.h | |||
@@ -95,6 +95,8 @@ struct flcn_u64 { | |||
95 | u32 hi; | 95 | u32 hi; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | #define nv_flcn_u64 flcn_u64 | ||
99 | |||
98 | struct flcn_mem_desc_v0 { | 100 | struct flcn_mem_desc_v0 { |
99 | struct flcn_u64 address; | 101 | struct flcn_u64 address; |
100 | u32 params; | 102 | u32 params; |
@@ -132,6 +134,8 @@ struct pmu_allocation_v3 { | |||
132 | } alloc; | 134 | } alloc; |
133 | }; | 135 | }; |
134 | 136 | ||
137 | #define nv_pmu_allocation pmu_allocation_v3 | ||
138 | |||
135 | struct pmu_hdr { | 139 | struct pmu_hdr { |
136 | u8 unit_id; | 140 | u8 unit_id; |
137 | u8 size; | 141 | u8 size; |
@@ -142,4 +146,36 @@ struct pmu_hdr { | |||
142 | #define nv_pmu_hdr pmu_hdr | 146 | #define nv_pmu_hdr pmu_hdr |
143 | typedef u8 flcn_status; | 147 | typedef u8 flcn_status; |
144 | 148 | ||
145 | #endif /*__PMU_COMMON_H__*/ | 149 | #define ALIGN_UP(v, gran) (((v) + ((gran) - 1)) & ~((gran)-1)) |
150 | |||
151 | /*! | ||
152 | * Falcon PMU DMA's minimum size in bytes. | ||
153 | */ | ||
154 | #define PMU_DMA_MIN_READ_SIZE_BYTES 16 | ||
155 | #define PMU_DMA_MIN_WRITE_SIZE_BYTES 4 | ||
156 | |||
157 | #define PMU_FB_COPY_RW_ALIGNMENT \ | ||
158 | (PMU_DMA_MIN_READ_SIZE_BYTES > PMU_DMA_MIN_WRITE_SIZE_BYTES ? \ | ||
159 | PMU_DMA_MIN_READ_SIZE_BYTES : PMU_DMA_MIN_WRITE_SIZE_BYTES) | ||
160 | |||
161 | /*! | ||
162 | * Macros to make aligned versions of RM_PMU_XXX structures. PMU needs aligned | ||
163 | * data structures to issue DMA read/write operations. | ||
164 | */ | ||
165 | #define NV_PMU_MAKE_ALIGNED_STRUCT(name, size) \ | ||
166 | union name##_aligned { \ | ||
167 | struct name data; \ | ||
168 | u8 pad[ALIGN_UP(sizeof(struct name), \ | ||
169 | (PMU_FB_COPY_RW_ALIGNMENT))]; \ | ||
170 | } | ||
171 | |||
172 | #define NV_PMU_MAKE_ALIGNED_UNION(name, size) \ | ||
173 | union name##_aligned { \ | ||
174 | union name data; \ | ||
175 | u8 pad[ALIGN_UP(sizeof(union name), \ | ||
176 | (PMU_FB_COPY_RW_ALIGNMENT))]; \ | ||
177 | } | ||
178 | |||
179 | #define NV_UNSIGNED_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b)) | ||
180 | |||
181 | #endif | ||