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authorTerje Bergstrom <tbergstrom@nvidia.com>2014-05-07 06:09:36 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:09:20 -0400
commit4ac110cb8a46a0c91a4a1e39c168de1b49688971 (patch)
tree5cf832c256e8e7b4c28c2a08ed28614d44c00ea4 /drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
parent4d93f777450e5bf46d5001426b3a437810cd852b (diff)
gpu: nvgpu: Register as subdomain of host1x
Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407543 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c39
1 files changed, 2 insertions, 37 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
index a5d5ad3e..ea49a124 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
@@ -92,37 +92,6 @@ int FXDIV(int x, int y)
92 return (x << pos) / y; 92 return (x << pos) / y;
93} 93}
94 94
95static int gk20a_tegra_channel_busy(struct platform_device *dev)
96{
97 int ret = 0;
98
99 /* Explicitly turn on the host1x clocks
100 * - This is needed as host1x driver sets ignore_children = true
101 * to cater the use case of display clock ON but host1x clock OFF
102 * in OS-Idle-Display-ON case
103 * - This was easily done in ACM as it only checked the ref count
104 * of host1x (or any device for that matter) to be zero before
105 * turning off its clock
106 * - However, runtime PM checks to see if *ANY* child of device is
107 * in ACTIVE state and if yes, it doesn't suspend the parent. As a
108 * result of this, display && host1x clocks remains ON during
109 * OS-Idle-Display-ON case
110 * - The code below fixes this use-case
111 */
112 if (to_platform_device(dev->dev.parent))
113 ret = nvhost_module_busy_ext(
114 to_platform_device(dev->dev.parent));
115
116 return ret;
117}
118
119static void gk20a_tegra_channel_idle(struct platform_device *dev)
120{
121 /* Explicitly turn off the host1x clocks */
122 if (to_platform_device(dev->dev.parent))
123 nvhost_module_idle_ext(to_platform_device(dev->dev.parent));
124}
125
126static void gk20a_tegra_secure_destroy(struct platform_device *pdev, 95static void gk20a_tegra_secure_destroy(struct platform_device *pdev,
127 struct gr_ctx_buffer_desc *desc) 96 struct gr_ctx_buffer_desc *desc)
128{ 97{
@@ -455,8 +424,8 @@ static int gk20a_tegra_late_probe(struct platform_device *dev)
455{ 424{
456 struct gk20a_platform *platform = gk20a_get_platform(dev); 425 struct gk20a_platform *platform = gk20a_get_platform(dev);
457 426
458 /* Make gk20a power domain a subdomain of mc */ 427 /* Make gk20a power domain a subdomain of host1x */
459 tegra_pd_add_sd(&platform->g->pd); 428 nvhost_register_client_domain(&platform->g->pd);
460 429
461 /* Initialise tegra specific scaling quirks */ 430 /* Initialise tegra specific scaling quirks */
462 gk20a_tegra_scale_init(dev); 431 gk20a_tegra_scale_init(dev);
@@ -520,8 +489,6 @@ struct gk20a_platform t132_gk20a_tegra_platform = {
520 .devfreq_governor = "nvhost_podgov", 489 .devfreq_governor = "nvhost_podgov",
521 .qos_id = PM_QOS_GPU_FREQ_MIN, 490 .qos_id = PM_QOS_GPU_FREQ_MIN,
522 491
523 .channel_busy = gk20a_tegra_channel_busy,
524 .channel_idle = gk20a_tegra_channel_idle,
525 .secure_alloc = gk20a_tegra_secure_alloc, 492 .secure_alloc = gk20a_tegra_secure_alloc,
526 .dump_platform_dependencies = gk20a_tegra_debug_dump, 493 .dump_platform_dependencies = gk20a_tegra_debug_dump,
527}; 494};
@@ -548,8 +515,6 @@ struct gk20a_platform gk20a_tegra_platform = {
548 .devfreq_governor = "nvhost_podgov", 515 .devfreq_governor = "nvhost_podgov",
549 .qos_id = PM_QOS_GPU_FREQ_MIN, 516 .qos_id = PM_QOS_GPU_FREQ_MIN,
550 517
551 .channel_busy = gk20a_tegra_channel_busy,
552 .channel_idle = gk20a_tegra_channel_idle,
553 .secure_alloc = gk20a_tegra_secure_alloc, 518 .secure_alloc = gk20a_tegra_secure_alloc,
554 .dump_platform_dependencies = gk20a_tegra_debug_dump, 519 .dump_platform_dependencies = gk20a_tegra_debug_dump,
555}; 520};