diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-03-15 18:54:16 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-06 21:14:42 -0400 |
commit | fa4ecf5730a75269e85cc41c2ad2ee61307e72a9 (patch) | |
tree | 188ede95097acee261a21f563bf8f844d7874861 /drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |
parent | 2ff3a9f374e6e7fb6c468789cf8e0213f2297bdf (diff) |
gpu: nvgpu: Split mem_desc from MM code
Split the mem_desc code out from the MM code. This is to help
simplify the MM code and make it easier to abstract the DMA
allocation routines.
JIRA NVGPU-12
Change-Id: I2ccb643efe6bbed80d1360a580ff5593acb407bd
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1323324
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 82 |
1 files changed, 4 insertions, 78 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index b425ec5c..da8bbb0a 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/dma-iommu.h> | 24 | #include <asm/dma-iommu.h> |
25 | #include <asm/cacheflush.h> | 25 | #include <asm/cacheflush.h> |
26 | 26 | ||
27 | #include <nvgpu/mem_desc.h> | ||
27 | #include <nvgpu/allocator.h> | 28 | #include <nvgpu/allocator.h> |
28 | #include <nvgpu/list.h> | 29 | #include <nvgpu/list.h> |
29 | #include <nvgpu/rbtree.h> | 30 | #include <nvgpu/rbtree.h> |
@@ -39,60 +40,12 @@ | |||
39 | outer_flush_range(pa, pa + (size_t)(size)); \ | 40 | outer_flush_range(pa, pa + (size_t)(size)); \ |
40 | } while (0) | 41 | } while (0) |
41 | 42 | ||
42 | /* | ||
43 | * Real location of a buffer - gk20a_aperture_mask() will deduce what will be | ||
44 | * told to the gpu about the aperture, but this flag designates where the | ||
45 | * memory actually was allocated from. | ||
46 | */ | ||
47 | enum gk20a_aperture { | ||
48 | APERTURE_INVALID, /* unallocated or N/A */ | ||
49 | APERTURE_SYSMEM, | ||
50 | APERTURE_VIDMEM | ||
51 | }; | ||
52 | |||
53 | enum gk20a_mem_rw_flag { | 43 | enum gk20a_mem_rw_flag { |
54 | gk20a_mem_flag_none = 0, | 44 | gk20a_mem_flag_none = 0, |
55 | gk20a_mem_flag_read_only = 1, | 45 | gk20a_mem_flag_read_only = 1, |
56 | gk20a_mem_flag_write_only = 2, | 46 | gk20a_mem_flag_write_only = 2, |
57 | }; | 47 | }; |
58 | 48 | ||
59 | static inline const char *gk20a_aperture_str(enum gk20a_aperture aperture) | ||
60 | { | ||
61 | switch (aperture) { | ||
62 | case APERTURE_INVALID: return "invalid"; | ||
63 | case APERTURE_SYSMEM: return "sysmem"; | ||
64 | case APERTURE_VIDMEM: return "vidmem"; | ||
65 | }; | ||
66 | return "UNKNOWN"; | ||
67 | } | ||
68 | |||
69 | struct mem_desc { | ||
70 | void *cpu_va; /* sysmem only */ | ||
71 | struct page **pages; /* sysmem only */ | ||
72 | struct sg_table *sgt; | ||
73 | enum gk20a_aperture aperture; | ||
74 | size_t size; | ||
75 | u64 gpu_va; | ||
76 | bool fixed; /* vidmem only */ | ||
77 | bool user_mem; /* vidmem only */ | ||
78 | struct nvgpu_allocator *allocator; /* vidmem only */ | ||
79 | struct nvgpu_list_node clear_list_entry; /* vidmem only */ | ||
80 | bool skip_wmb; | ||
81 | unsigned long flags; | ||
82 | }; | ||
83 | |||
84 | static inline struct mem_desc * | ||
85 | mem_desc_from_clear_list_entry(struct nvgpu_list_node *node) | ||
86 | { | ||
87 | return (struct mem_desc *) | ||
88 | ((uintptr_t)node - offsetof(struct mem_desc, clear_list_entry)); | ||
89 | }; | ||
90 | |||
91 | struct mem_desc_sub { | ||
92 | u32 offset; | ||
93 | u32 size; | ||
94 | }; | ||
95 | |||
96 | struct gpfifo_desc { | 49 | struct gpfifo_desc { |
97 | struct mem_desc mem; | 50 | struct mem_desc mem; |
98 | u32 entry_num; | 51 | u32 entry_num; |
@@ -511,36 +464,9 @@ enum gmmu_pgsz_gk20a __get_pte_size_fixed_map(struct vm_gk20a *vm, | |||
511 | u64 base, u64 size); | 464 | u64 base, u64 size); |
512 | enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size); | 465 | enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size); |
513 | 466 | ||
514 | struct nvgpu_page_alloc * | 467 | void set_vidmem_page_alloc(struct scatterlist *sgl, u64 addr); |
515 | get_vidmem_page_alloc(struct scatterlist *sgl); | 468 | bool is_vidmem_page_alloc(u64 addr); |
516 | 469 | struct nvgpu_page_alloc *get_vidmem_page_alloc(struct scatterlist *sgl); | |
517 | /* | ||
518 | * Buffer accessors - wrap between begin() and end() if there is no permanent | ||
519 | * kernel mapping for this buffer. | ||
520 | */ | ||
521 | |||
522 | int gk20a_mem_begin(struct gk20a *g, struct mem_desc *mem); | ||
523 | /* nop for null mem, like with free() or vunmap() */ | ||
524 | void gk20a_mem_end(struct gk20a *g, struct mem_desc *mem); | ||
525 | |||
526 | /* word-indexed offset */ | ||
527 | u32 gk20a_mem_rd32(struct gk20a *g, struct mem_desc *mem, u32 w); | ||
528 | /* byte offset (32b-aligned) */ | ||
529 | u32 gk20a_mem_rd(struct gk20a *g, struct mem_desc *mem, u32 offset); | ||
530 | /* memcpy to cpu, offset and size in bytes (32b-aligned) */ | ||
531 | void gk20a_mem_rd_n(struct gk20a *g, struct mem_desc *mem, u32 offset, | ||
532 | void *dest, u32 size); | ||
533 | |||
534 | /* word-indexed offset */ | ||
535 | void gk20a_mem_wr32(struct gk20a *g, struct mem_desc *mem, u32 w, u32 data); | ||
536 | /* byte offset (32b-aligned) */ | ||
537 | void gk20a_mem_wr(struct gk20a *g, struct mem_desc *mem, u32 offset, u32 data); | ||
538 | /* memcpy from cpu, offset and size in bytes (32b-aligned) */ | ||
539 | void gk20a_mem_wr_n(struct gk20a *g, struct mem_desc *mem, u32 offset, | ||
540 | void *src, u32 size); | ||
541 | /* size and offset in bytes (32b-aligned), filled with the constant byte c */ | ||
542 | void gk20a_memset(struct gk20a *g, struct mem_desc *mem, u32 offset, | ||
543 | u32 c, u32 size); | ||
544 | 470 | ||
545 | #if 0 /*related to addr bits above, concern below TBD on which is accurate */ | 471 | #if 0 /*related to addr bits above, concern below TBD on which is accurate */ |
546 | #define bar1_instance_block_shift_gk20a() (max_physaddr_bits_gk20a() -\ | 472 | #define bar1_instance_block_shift_gk20a() (max_physaddr_bits_gk20a() -\ |