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authorAlex Waterman <alexw@nvidia.com>2017-04-17 19:26:28 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-19 18:34:01 -0400
commitd37e8f7dcf190f31f9c0c12583db2bb0c0d313c0 (patch)
tree4807c89bf40954c54804c3a8dd88c16849181f29 /drivers/gpu/nvgpu/gk20a/mm_gk20a.h
parentdcb744acfbbc11e66cac2d0a674a42e62d908b9d (diff)
gpu: nvgpu: Split VM interface out
This patch begins the major rework of the GPU's virtual memory manager (VMM). The VMM is the piece of code that handles the userspace interface to buffers and their mappings into the GMMU. The core data structure is the VM - for now still known as 'struct vm_gk20a'. Each one of these structs represents one addres space to which channels or TSGs may bind themselves to. The VMM splits the interface up into two broad categories. First there's the common, OS independent interfaces; and second there's the OS specific interfaces. OS independent -------------- This is the code that manages the lifetime of VMs, the buffers inside VMs (search, batch mapping) creation, destruction, etc. OS Specific ----------- This handles mapping of buffers represented as they are represented by the OS (dma_buf's for example on Linux). This patch is by no means complete. There's still Linux specific functions scattered in ostensibly OS independent code. This is the first step. A patch that rewrites everything in one go would simply be too big to effectively review. Instead the goal of this change is to simply separate out the basic OS specific and OS agnostic interfaces into their own header files. The next series of patches will start to pull the relevant implementations into OS specific C files and common C files. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I242c7206047b6c769296226d855b7e44d5c4bfa8 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464939 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h174
1 files changed, 2 insertions, 172 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 0a102cb2..331843cc 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -26,6 +26,7 @@
26 26
27#include <nvgpu/nvgpu_mem.h> 27#include <nvgpu/nvgpu_mem.h>
28#include <nvgpu/allocator.h> 28#include <nvgpu/allocator.h>
29#include <nvgpu/vm.h>
29#include <nvgpu/list.h> 30#include <nvgpu/list.h>
30#include <nvgpu/rbtree.h> 31#include <nvgpu/rbtree.h>
31#include <nvgpu/kref.h> 32#include <nvgpu/kref.h>
@@ -116,13 +117,6 @@ gk20a_buffer_state_from_list(struct nvgpu_list_node *node)
116 ((uintptr_t)node - offsetof(struct gk20a_buffer_state, list)); 117 ((uintptr_t)node - offsetof(struct gk20a_buffer_state, list));
117}; 118};
118 119
119enum gmmu_pgsz_gk20a {
120 gmmu_page_size_small = 0,
121 gmmu_page_size_big = 1,
122 gmmu_page_size_kernel = 2,
123 gmmu_nr_page_sizes = 3,
124};
125
126struct gk20a_comptags { 120struct gk20a_comptags {
127 u32 offset; 121 u32 offset;
128 u32 lines; 122 u32 lines;
@@ -130,15 +124,6 @@ struct gk20a_comptags {
130 bool user_mappable; 124 bool user_mappable;
131}; 125};
132 126
133struct gk20a_mm_entry {
134 /* backing for */
135 struct nvgpu_mem mem;
136 u32 woffset; /* if >0, mem is a shadow copy, owned by another entry */
137 int pgsz;
138 struct gk20a_mm_entry *entries;
139 int num_entries;
140};
141
142struct priv_cmd_queue { 127struct priv_cmd_queue {
143 struct nvgpu_mem mem; 128 struct nvgpu_mem mem;
144 u32 size; /* num of entries in words */ 129 u32 size; /* num of entries in words */
@@ -214,84 +199,6 @@ vm_reserved_va_node_from_reserved_va_list(struct nvgpu_list_node *node)
214 ((uintptr_t)node - offsetof(struct vm_reserved_va_node, reserved_va_list)); 199 ((uintptr_t)node - offsetof(struct vm_reserved_va_node, reserved_va_list));
215}; 200};
216 201
217struct gk20a_mmu_level {
218 int hi_bit[2];
219 int lo_bit[2];
220 int (*update_entry)(struct vm_gk20a *vm,
221 struct gk20a_mm_entry *pte,
222 u32 i, u32 gmmu_pgsz_idx,
223 struct scatterlist **sgl,
224 u64 *offset,
225 u64 *iova,
226 u32 kind_v, u64 *ctag,
227 bool cacheable, bool unmapped_pte,
228 int rw_flag, bool sparse, bool priv,
229 enum nvgpu_aperture aperture);
230 size_t entry_size;
231};
232
233/* map/unmap batch state */
234struct vm_gk20a_mapping_batch
235{
236 bool gpu_l2_flushed;
237 bool need_tlb_invalidate;
238};
239
240struct vm_gk20a {
241 struct mm_gk20a *mm;
242 struct gk20a_as_share *as_share; /* as_share this represents */
243
244 u64 va_start;
245 u64 va_limit;
246
247 int num_user_mapped_buffers;
248
249 bool big_pages; /* enable large page support */
250 bool enable_ctag;
251 bool mapped;
252
253 u32 big_page_size;
254
255 bool userspace_managed;
256
257 const struct gk20a_mmu_level *mmu_levels;
258
259 struct kref ref;
260
261 struct nvgpu_mutex update_gmmu_lock;
262
263 struct gk20a_mm_entry pdb;
264
265 /*
266 * These structs define the address spaces. In some cases it's possible
267 * to merge address spaces (user and user_lp) and in other cases it's
268 * not. vma[] allows the code to be agnostic to this by always using
269 * address spaces through this pointer array.
270 */
271 struct nvgpu_allocator *vma[gmmu_nr_page_sizes];
272 struct nvgpu_allocator kernel;
273 struct nvgpu_allocator user;
274 struct nvgpu_allocator user_lp;
275
276 struct nvgpu_rbtree_node *mapped_buffers;
277
278 struct nvgpu_list_node reserved_va_list;
279
280#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
281 u64 handle;
282#endif
283 u32 gmmu_page_sizes[gmmu_nr_page_sizes];
284
285 /* if non-NULL, kref_put will use this batch when
286 unmapping. Must hold vm->update_gmmu_lock. */
287 struct vm_gk20a_mapping_batch *kref_put_batch;
288
289 /*
290 * Each address space needs to have a semaphore pool.
291 */
292 struct nvgpu_semaphore_pool *sema_pool;
293};
294
295struct gk20a; 202struct gk20a;
296struct channel_gk20a; 203struct channel_gk20a;
297 204
@@ -562,57 +469,13 @@ struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf);
562void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf, 469void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
563 struct sg_table *sgt); 470 struct sg_table *sgt);
564 471
565u64 gk20a_vm_map(struct vm_gk20a *vm, 472int nvgpu_vm_get_compbits_info(struct vm_gk20a *vm,
566 struct dma_buf *dmabuf,
567 u64 offset_align,
568 u32 flags /*NVGPU_AS_MAP_BUFFER_FLAGS_*/,
569 int kind,
570 struct sg_table **sgt,
571 bool user_mapped,
572 int rw_flag,
573 u64 buffer_offset,
574 u64 mapping_size,
575 struct vm_gk20a_mapping_batch *mapping_batch);
576
577int gk20a_vm_get_compbits_info(struct vm_gk20a *vm,
578 u64 mapping_gva, 473 u64 mapping_gva,
579 u64 *compbits_win_size, 474 u64 *compbits_win_size,
580 u32 *compbits_win_ctagline, 475 u32 *compbits_win_ctagline,
581 u32 *mapping_ctagline, 476 u32 *mapping_ctagline,
582 u32 *flags); 477 u32 *flags);
583 478
584int gk20a_vm_map_compbits(struct vm_gk20a *vm,
585 u64 mapping_gva,
586 u64 *compbits_win_gva,
587 u64 *mapping_iova,
588 u32 flags);
589
590/* unmap handle from kernel */
591void gk20a_vm_unmap(struct vm_gk20a *vm, u64 offset);
592
593void gk20a_vm_unmap_locked(struct mapped_buffer_node *mapped_buffer,
594 struct vm_gk20a_mapping_batch *batch);
595
596/* get reference to all currently mapped buffers */
597int gk20a_vm_get_buffers(struct vm_gk20a *vm,
598 struct mapped_buffer_node ***mapped_buffers,
599 int *num_buffers);
600
601/* put references on the given buffers */
602void gk20a_vm_put_buffers(struct vm_gk20a *vm,
603 struct mapped_buffer_node **mapped_buffers,
604 int num_buffers);
605
606/* find buffer corresponding to va */
607int gk20a_vm_find_buffer(struct vm_gk20a *vm, u64 gpu_va,
608 struct dma_buf **dmabuf,
609 u64 *offset);
610
611void gk20a_vm_get(struct vm_gk20a *vm);
612void gk20a_vm_put(struct vm_gk20a *vm);
613
614void gk20a_vm_remove_support(struct vm_gk20a *vm);
615
616u64 gk20a_vm_alloc_va(struct vm_gk20a *vm, 479u64 gk20a_vm_alloc_va(struct vm_gk20a *vm,
617 u64 size, 480 u64 size,
618 enum gmmu_pgsz_gk20a gmmu_pgsz_idx); 481 enum gmmu_pgsz_gk20a gmmu_pgsz_idx);
@@ -635,44 +498,11 @@ int gk20a_vm_bind_channel(struct gk20a_as_share *as_share,
635 struct channel_gk20a *ch); 498 struct channel_gk20a *ch);
636int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch); 499int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch);
637 500
638/* batching eliminates redundant cache flushes and invalidates */
639void gk20a_vm_mapping_batch_start(struct vm_gk20a_mapping_batch *batch);
640void gk20a_vm_mapping_batch_finish(
641 struct vm_gk20a *vm, struct vm_gk20a_mapping_batch *batch);
642/* called when holding vm->update_gmmu_lock */
643void gk20a_vm_mapping_batch_finish_locked(
644 struct vm_gk20a *vm, struct vm_gk20a_mapping_batch *batch);
645
646
647int gk20a_vidmem_buf_alloc(struct gk20a *g, size_t bytes); 501int gk20a_vidmem_buf_alloc(struct gk20a *g, size_t bytes);
648int gk20a_vidmem_get_space(struct gk20a *g, u64 *space); 502int gk20a_vidmem_get_space(struct gk20a *g, u64 *space);
649int gk20a_vidbuf_access_memory(struct gk20a *g, struct dma_buf *dmabuf, 503int gk20a_vidbuf_access_memory(struct gk20a *g, struct dma_buf *dmabuf,
650 void *buffer, u64 offset, u64 size, u32 cmd); 504 void *buffer, u64 offset, u64 size, u32 cmd);
651 505
652/* Note: batch may be NULL if map op is not part of a batch */
653int gk20a_vm_map_buffer(struct vm_gk20a *vm,
654 int dmabuf_fd,
655 u64 *offset_align,
656 u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */
657 int kind,
658 u64 buffer_offset,
659 u64 mapping_size,
660 struct vm_gk20a_mapping_batch *batch);
661
662int gk20a_init_vm(struct mm_gk20a *mm,
663 struct vm_gk20a *vm,
664 u32 big_page_size,
665 u64 low_hole,
666 u64 kernel_reserved,
667 u64 aperture_size,
668 bool big_pages,
669 bool userspace_managed,
670 char *name);
671void gk20a_deinit_vm(struct vm_gk20a *vm);
672
673/* Note: batch may be NULL if unmap op is not part of a batch */
674int gk20a_vm_unmap_buffer(struct vm_gk20a *vm, u64 offset,
675 struct vm_gk20a_mapping_batch *batch);
676void gk20a_get_comptags(struct device *dev, struct dma_buf *dmabuf, 506void gk20a_get_comptags(struct device *dev, struct dma_buf *dmabuf,
677 struct gk20a_comptags *comptags); 507 struct gk20a_comptags *comptags);
678dma_addr_t gk20a_mm_gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr); 508dma_addr_t gk20a_mm_gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr);