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authorAlex Waterman <alexw@nvidia.com>2018-01-16 19:38:19 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-19 20:29:09 -0500
commit137006fe783a0829a26f4f179f19f3d73fc050c4 (patch)
treecc98030557d355cad4da6c7216440d6e5d3ee4b7 /drivers/gpu/nvgpu/gk20a/mm_gk20a.h
parentc713934675b32b30f3939f3ab4dd7466eb96a523 (diff)
gpu: nvgpu: Update gk20a pde bit coverage function
The mm_gk20a.c function that returns number of bits that a PDE covers is very useful for determing PDE size for all chips. Copy this into the common VM code since this applies to all chips/platforms. Bug 200105199 Change-Id: I437da4781be2fa7c540abe52b20f4c4321f6c649 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1639730 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index ee0c2a07..14629611 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -172,7 +172,6 @@ int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch);
172void pde_range_from_vaddr_range(struct vm_gk20a *vm, 172void pde_range_from_vaddr_range(struct vm_gk20a *vm,
173 u64 addr_lo, u64 addr_hi, 173 u64 addr_lo, u64 addr_hi,
174 u32 *pde_lo, u32 *pde_hi); 174 u32 *pde_lo, u32 *pde_hi);
175int gk20a_mm_pde_coverage_bit_count(struct vm_gk20a *vm);
176u32 gk20a_mm_get_iommu_bit(struct gk20a *g); 175u32 gk20a_mm_get_iommu_bit(struct gk20a *g);
177 176
178const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g, 177const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g,