gpu: nvgpu: Separate GMMU mapping impl from mm_gk20a.c

Separate the non-chip specific GMMU mapping implementation code
out of mm_gk20a.c. This puts all of the chip-agnostic code into
common/mm/gmmu.c in preparation for rewriting it.

JIRA NVGPU-12
JIRA NVGPU-30

Change-Id: I6f7fdac3422703f5e80bb22ad304dc27bba4814d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1480228
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 7e2ba051..2581bc0d 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -433,17 +433,10 @@ int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev);
 int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
                            u64 offset, struct gk20a_buffer_state **state);
 
-int map_gmmu_pages(struct gk20a *g, struct gk20a_mm_entry *entry);
-void unmap_gmmu_pages(struct gk20a *g, struct gk20a_mm_entry *entry);
 void pde_range_from_vaddr_range(struct vm_gk20a *vm,
                                               u64 addr_lo, u64 addr_hi,
                                               u32 *pde_lo, u32 *pde_hi);
 int gk20a_mm_pde_coverage_bit_count(struct vm_gk20a *vm);
-u32 pte_index_from_vaddr(struct vm_gk20a *vm,
-                               u64 addr, enum gmmu_pgsz_gk20a pgsz_idx);
-void free_gmmu_pages(struct vm_gk20a *vm,
-                     struct gk20a_mm_entry *entry);
-
 u32 gk20a_mm_get_physical_addr_bits(struct gk20a *g);
 
 struct gpu_ops;