diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-10-20 12:32:55 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-23 01:15:28 -0400 |
commit | fea32c74dcfa708608f286fe5020f1f40a3390c0 (patch) | |
tree | 24ff1949dd3e30e8a2fb3557a5592ede2b3d6fdb /drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |
parent | 1cee7b2a390a8b2486b25d2383e4e11667dcff08 (diff) |
gpu: nvgpu: add cache maintenance timeout override
Add functions to get per-chip cache maintenance timeout overrides.
JIRA: NVGPUGV100-GV100
Change-Id: Ie14efc616e7af52ede60031c789bd2ae70857a6e
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1582768
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 67ab307f..d96fa4e1 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -790,6 +790,7 @@ int gk20a_mm_fb_flush(struct gk20a *g) | |||
790 | u32 data; | 790 | u32 data; |
791 | int ret = 0; | 791 | int ret = 0; |
792 | struct nvgpu_timeout timeout; | 792 | struct nvgpu_timeout timeout; |
793 | u32 retries; | ||
793 | 794 | ||
794 | gk20a_dbg_fn(""); | 795 | gk20a_dbg_fn(""); |
795 | 796 | ||
@@ -799,7 +800,12 @@ int gk20a_mm_fb_flush(struct gk20a *g) | |||
799 | return 0; | 800 | return 0; |
800 | } | 801 | } |
801 | 802 | ||
802 | nvgpu_timeout_init(g, &timeout, 100, NVGPU_TIMER_RETRY_TIMER); | 803 | retries = 100; |
804 | |||
805 | if (g->ops.mm.get_flush_retries) | ||
806 | retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_FB); | ||
807 | |||
808 | nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER); | ||
803 | 809 | ||
804 | nvgpu_mutex_acquire(&mm->l2_op_lock); | 810 | nvgpu_mutex_acquire(&mm->l2_op_lock); |
805 | 811 | ||
@@ -844,10 +850,14 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g) | |||
844 | { | 850 | { |
845 | u32 data; | 851 | u32 data; |
846 | struct nvgpu_timeout timeout; | 852 | struct nvgpu_timeout timeout; |
853 | u32 retries = 200; | ||
847 | 854 | ||
848 | trace_gk20a_mm_l2_invalidate(g->name); | 855 | trace_gk20a_mm_l2_invalidate(g->name); |
849 | 856 | ||
850 | nvgpu_timeout_init(g, &timeout, 200, NVGPU_TIMER_RETRY_TIMER); | 857 | if (g->ops.mm.get_flush_retries) |
858 | retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_L2_INV); | ||
859 | |||
860 | nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER); | ||
851 | 861 | ||
852 | /* Invalidate any clean lines from the L2 so subsequent reads go to | 862 | /* Invalidate any clean lines from the L2 so subsequent reads go to |
853 | DRAM. Dirty lines are not affected by this operation. */ | 863 | DRAM. Dirty lines are not affected by this operation. */ |
@@ -891,6 +901,7 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate) | |||
891 | struct mm_gk20a *mm = &g->mm; | 901 | struct mm_gk20a *mm = &g->mm; |
892 | u32 data; | 902 | u32 data; |
893 | struct nvgpu_timeout timeout; | 903 | struct nvgpu_timeout timeout; |
904 | u32 retries = 2000; | ||
894 | 905 | ||
895 | gk20a_dbg_fn(""); | 906 | gk20a_dbg_fn(""); |
896 | 907 | ||
@@ -898,7 +909,10 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate) | |||
898 | if (!g->power_on) | 909 | if (!g->power_on) |
899 | goto hw_was_off; | 910 | goto hw_was_off; |
900 | 911 | ||
901 | nvgpu_timeout_init(g, &timeout, 2000, NVGPU_TIMER_RETRY_TIMER); | 912 | if (g->ops.mm.get_flush_retries) |
913 | retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_L2_FLUSH); | ||
914 | |||
915 | nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER); | ||
902 | 916 | ||
903 | nvgpu_mutex_acquire(&mm->l2_op_lock); | 917 | nvgpu_mutex_acquire(&mm->l2_op_lock); |
904 | 918 | ||
@@ -939,6 +953,7 @@ void gk20a_mm_cbc_clean(struct gk20a *g) | |||
939 | struct mm_gk20a *mm = &g->mm; | 953 | struct mm_gk20a *mm = &g->mm; |
940 | u32 data; | 954 | u32 data; |
941 | struct nvgpu_timeout timeout; | 955 | struct nvgpu_timeout timeout; |
956 | u32 retries = 200; | ||
942 | 957 | ||
943 | gk20a_dbg_fn(""); | 958 | gk20a_dbg_fn(""); |
944 | 959 | ||
@@ -946,7 +961,10 @@ void gk20a_mm_cbc_clean(struct gk20a *g) | |||
946 | if (!g->power_on) | 961 | if (!g->power_on) |
947 | goto hw_was_off; | 962 | goto hw_was_off; |
948 | 963 | ||
949 | nvgpu_timeout_init(g, &timeout, 200, NVGPU_TIMER_RETRY_TIMER); | 964 | if (g->ops.mm.get_flush_retries) |
965 | retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_CBC_CLEAN); | ||
966 | |||
967 | nvgpu_timeout_init(g, &timeout, retries, NVGPU_TIMER_RETRY_TIMER); | ||
950 | 968 | ||
951 | nvgpu_mutex_acquire(&mm->l2_op_lock); | 969 | nvgpu_mutex_acquire(&mm->l2_op_lock); |
952 | 970 | ||