diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-05-09 21:34:54 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-06 20:09:16 -0400 |
commit | c21f5bca9ae81804130e30ea3e6f7a18d51203dc (patch) | |
tree | fb1a2d67532df19d70468610ad2a62c3464876c1 /drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |
parent | c2b63150cd947557b8d17637258b988459b8e0ec (diff) |
gpu: nvgpu: Remove extraneous VM init/deinit APIs
Support only VM pointers and ref-counting for maintaining VMs. This
dramatically reduces the complexity of the APIs, avoids the API
abuse that has existed, and ensures that future VM usage is
consistent with current usage.
Also remove the combined VM free/instance block deletion. Any place
where this was done is now replaced with an explict free of the
instance block and a nvgpu_vm_put().
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: Ib73e8d574ecc9abf6dad0b40a2c5795d6396cc8c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1480227
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 97 |
1 files changed, 52 insertions, 45 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 87e6f30c..a1873a30 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -465,8 +465,7 @@ static void gk20a_remove_mm_ce_support(struct mm_gk20a *mm) | |||
465 | 465 | ||
466 | mm->vidmem.ce_ctx_id = (u32)~0; | 466 | mm->vidmem.ce_ctx_id = (u32)~0; |
467 | 467 | ||
468 | __nvgpu_vm_remove(&mm->ce.vm); | 468 | nvgpu_vm_put(mm->ce.vm); |
469 | |||
470 | } | 469 | } |
471 | 470 | ||
472 | static void gk20a_remove_mm_support(struct mm_gk20a *mm) | 471 | static void gk20a_remove_mm_support(struct mm_gk20a *mm) |
@@ -476,12 +475,15 @@ static void gk20a_remove_mm_support(struct mm_gk20a *mm) | |||
476 | if (g->ops.mm.remove_bar2_vm) | 475 | if (g->ops.mm.remove_bar2_vm) |
477 | g->ops.mm.remove_bar2_vm(g); | 476 | g->ops.mm.remove_bar2_vm(g); |
478 | 477 | ||
479 | if (g->ops.mm.is_bar1_supported(g)) | 478 | if (g->ops.mm.is_bar1_supported(g)) { |
480 | nvgpu_vm_remove_inst(&mm->bar1.vm, &mm->bar1.inst_block); | 479 | gk20a_free_inst_block(g, &mm->bar1.inst_block); |
480 | nvgpu_vm_put(mm->bar1.vm); | ||
481 | } | ||
481 | 482 | ||
482 | nvgpu_vm_remove_inst(&mm->pmu.vm, &mm->pmu.inst_block); | 483 | gk20a_free_inst_block(g, &mm->pmu.inst_block); |
483 | gk20a_free_inst_block(gk20a_from_mm(mm), &mm->hwpm.inst_block); | 484 | gk20a_free_inst_block(g, &mm->hwpm.inst_block); |
484 | __nvgpu_vm_remove(&mm->cde.vm); | 485 | nvgpu_vm_put(mm->pmu.vm); |
486 | nvgpu_vm_put(mm->cde.vm); | ||
485 | 487 | ||
486 | gk20a_semaphore_sea_destroy(g); | 488 | gk20a_semaphore_sea_destroy(g); |
487 | gk20a_vidmem_destroy(g); | 489 | gk20a_vidmem_destroy(g); |
@@ -2641,30 +2643,31 @@ u64 gk20a_mm_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block) | |||
2641 | static int gk20a_init_bar1_vm(struct mm_gk20a *mm) | 2643 | static int gk20a_init_bar1_vm(struct mm_gk20a *mm) |
2642 | { | 2644 | { |
2643 | int err; | 2645 | int err; |
2644 | struct vm_gk20a *vm = &mm->bar1.vm; | ||
2645 | struct gk20a *g = gk20a_from_mm(mm); | 2646 | struct gk20a *g = gk20a_from_mm(mm); |
2646 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; | 2647 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; |
2647 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2648 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2648 | 2649 | ||
2649 | mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20; | 2650 | mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20; |
2650 | gk20a_dbg_info("bar1 vm size = 0x%x", mm->bar1.aperture_size); | 2651 | gk20a_dbg_info("bar1 vm size = 0x%x", mm->bar1.aperture_size); |
2651 | nvgpu_init_vm(mm, vm, | 2652 | mm->bar1.vm = nvgpu_vm_init(g, |
2652 | big_page_size, | 2653 | big_page_size, |
2653 | SZ_4K, /* Low hole */ | 2654 | SZ_4K, |
2654 | mm->bar1.aperture_size - SZ_4K, /* Kernel reserved. */ | 2655 | mm->bar1.aperture_size - SZ_4K, |
2655 | mm->bar1.aperture_size, | 2656 | mm->bar1.aperture_size, |
2656 | true, false, | 2657 | true, false, |
2657 | "bar1"); | 2658 | "bar1"); |
2659 | if (!mm->bar1.vm) | ||
2660 | return -ENOMEM; | ||
2658 | 2661 | ||
2659 | err = gk20a_alloc_inst_block(g, inst_block); | 2662 | err = gk20a_alloc_inst_block(g, inst_block); |
2660 | if (err) | 2663 | if (err) |
2661 | goto clean_up_va; | 2664 | goto clean_up_vm; |
2662 | g->ops.mm.init_inst_block(inst_block, vm, big_page_size); | 2665 | g->ops.mm.init_inst_block(inst_block, mm->bar1.vm, big_page_size); |
2663 | 2666 | ||
2664 | return 0; | 2667 | return 0; |
2665 | 2668 | ||
2666 | clean_up_va: | 2669 | clean_up_vm: |
2667 | nvgpu_deinit_vm(vm); | 2670 | nvgpu_vm_put(mm->bar1.vm); |
2668 | return err; | 2671 | return err; |
2669 | } | 2672 | } |
2670 | 2673 | ||
@@ -2672,7 +2675,6 @@ clean_up_va: | |||
2672 | static int gk20a_init_system_vm(struct mm_gk20a *mm) | 2675 | static int gk20a_init_system_vm(struct mm_gk20a *mm) |
2673 | { | 2676 | { |
2674 | int err; | 2677 | int err; |
2675 | struct vm_gk20a *vm = &mm->pmu.vm; | ||
2676 | struct gk20a *g = gk20a_from_mm(mm); | 2678 | struct gk20a *g = gk20a_from_mm(mm); |
2677 | struct nvgpu_mem *inst_block = &mm->pmu.inst_block; | 2679 | struct nvgpu_mem *inst_block = &mm->pmu.inst_block; |
2678 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2680 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
@@ -2687,65 +2689,70 @@ static int gk20a_init_system_vm(struct mm_gk20a *mm) | |||
2687 | mm->pmu.aperture_size = GK20A_PMU_VA_SIZE; | 2689 | mm->pmu.aperture_size = GK20A_PMU_VA_SIZE; |
2688 | gk20a_dbg_info("pmu vm size = 0x%x", mm->pmu.aperture_size); | 2690 | gk20a_dbg_info("pmu vm size = 0x%x", mm->pmu.aperture_size); |
2689 | 2691 | ||
2690 | nvgpu_init_vm(mm, vm, big_page_size, | 2692 | mm->pmu.vm = nvgpu_vm_init(g, big_page_size, |
2691 | low_hole, | 2693 | low_hole, |
2692 | aperture_size - low_hole, | 2694 | aperture_size - low_hole, |
2693 | aperture_size, | 2695 | aperture_size, |
2694 | true, | 2696 | true, |
2695 | false, | 2697 | false, |
2696 | "system"); | 2698 | "system"); |
2699 | if (!mm->pmu.vm) | ||
2700 | return -ENOMEM; | ||
2697 | 2701 | ||
2698 | err = gk20a_alloc_inst_block(g, inst_block); | 2702 | err = gk20a_alloc_inst_block(g, inst_block); |
2699 | if (err) | 2703 | if (err) |
2700 | goto clean_up_va; | 2704 | goto clean_up_vm; |
2701 | g->ops.mm.init_inst_block(inst_block, vm, big_page_size); | 2705 | g->ops.mm.init_inst_block(inst_block, mm->pmu.vm, big_page_size); |
2702 | 2706 | ||
2703 | return 0; | 2707 | return 0; |
2704 | 2708 | ||
2705 | clean_up_va: | 2709 | clean_up_vm: |
2706 | nvgpu_deinit_vm(vm); | 2710 | nvgpu_vm_put(mm->pmu.vm); |
2707 | return err; | 2711 | return err; |
2708 | } | 2712 | } |
2709 | 2713 | ||
2710 | static int gk20a_init_hwpm(struct mm_gk20a *mm) | 2714 | static int gk20a_init_hwpm(struct mm_gk20a *mm) |
2711 | { | 2715 | { |
2712 | int err; | 2716 | int err; |
2713 | struct vm_gk20a *vm = &mm->pmu.vm; | ||
2714 | struct gk20a *g = gk20a_from_mm(mm); | 2717 | struct gk20a *g = gk20a_from_mm(mm); |
2715 | struct nvgpu_mem *inst_block = &mm->hwpm.inst_block; | 2718 | struct nvgpu_mem *inst_block = &mm->hwpm.inst_block; |
2716 | 2719 | ||
2717 | err = gk20a_alloc_inst_block(g, inst_block); | 2720 | err = gk20a_alloc_inst_block(g, inst_block); |
2718 | if (err) | 2721 | if (err) |
2719 | return err; | 2722 | return err; |
2720 | g->ops.mm.init_inst_block(inst_block, vm, 0); | 2723 | g->ops.mm.init_inst_block(inst_block, mm->pmu.vm, 0); |
2721 | 2724 | ||
2722 | return 0; | 2725 | return 0; |
2723 | } | 2726 | } |
2724 | 2727 | ||
2725 | static int gk20a_init_cde_vm(struct mm_gk20a *mm) | 2728 | static int gk20a_init_cde_vm(struct mm_gk20a *mm) |
2726 | { | 2729 | { |
2727 | struct vm_gk20a *vm = &mm->cde.vm; | ||
2728 | struct gk20a *g = gk20a_from_mm(mm); | 2730 | struct gk20a *g = gk20a_from_mm(mm); |
2729 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2731 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2730 | 2732 | ||
2731 | return nvgpu_init_vm(mm, vm, big_page_size, | 2733 | mm->cde.vm = nvgpu_vm_init(g, big_page_size, |
2732 | big_page_size << 10, | 2734 | big_page_size << 10, |
2733 | NV_MM_DEFAULT_KERNEL_SIZE, | 2735 | NV_MM_DEFAULT_KERNEL_SIZE, |
2734 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, | 2736 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, |
2735 | false, false, "cde"); | 2737 | false, false, "cde"); |
2738 | if (!mm->cde.vm) | ||
2739 | return -ENOMEM; | ||
2740 | return 0; | ||
2736 | } | 2741 | } |
2737 | 2742 | ||
2738 | static int gk20a_init_ce_vm(struct mm_gk20a *mm) | 2743 | static int gk20a_init_ce_vm(struct mm_gk20a *mm) |
2739 | { | 2744 | { |
2740 | struct vm_gk20a *vm = &mm->ce.vm; | ||
2741 | struct gk20a *g = gk20a_from_mm(mm); | 2745 | struct gk20a *g = gk20a_from_mm(mm); |
2742 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2746 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2743 | 2747 | ||
2744 | return nvgpu_init_vm(mm, vm, big_page_size, | 2748 | mm->ce.vm = nvgpu_vm_init(g, big_page_size, |
2745 | big_page_size << 10, | 2749 | big_page_size << 10, |
2746 | NV_MM_DEFAULT_KERNEL_SIZE, | 2750 | NV_MM_DEFAULT_KERNEL_SIZE, |
2747 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, | 2751 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, |
2748 | false, false, "ce"); | 2752 | false, false, "ce"); |
2753 | if (!mm->ce.vm) | ||
2754 | return -ENOMEM; | ||
2755 | return 0; | ||
2749 | } | 2756 | } |
2750 | 2757 | ||
2751 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | 2758 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, |