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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-03-31 16:33:02 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-04-13 16:12:41 -0400
commit9b5427da37161c350d28a821652f2bb84bca360f (patch)
tree989e7b649b7b5e54d1d316b245b61c1881a15de6 /drivers/gpu/nvgpu/gk20a/mm_gk20a.c
parent2adf9164d9d68cc3ab700af84724034682f44ab8 (diff)
gpu: nvgpu: Support GPUs with no physical mode
Support GPUs which cannot choose between SMMU and physical addressing. Change-Id: If3256fa1bc795a84d039ad3aa63ebdccf5cc0afb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120469 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index ac4625e0..519faeeb 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -482,7 +482,7 @@ int gk20a_init_mm_setup_hw(struct gk20a *g)
482{ 482{
483 struct mm_gk20a *mm = &g->mm; 483 struct mm_gk20a *mm = &g->mm;
484 struct mem_desc *inst_block = &mm->bar1.inst_block; 484 struct mem_desc *inst_block = &mm->bar1.inst_block;
485 phys_addr_t inst_pa = gk20a_mem_phys(inst_block); 485 u64 inst_pa = gk20a_mm_inst_block_addr(g, inst_block);
486 int err; 486 int err;
487 487
488 gk20a_dbg_fn(""); 488 gk20a_dbg_fn("");
@@ -2249,7 +2249,7 @@ void gk20a_free_sgtable(struct sg_table **sgt)
2249 2249
2250u64 gk20a_mm_smmu_vaddr_translate(struct gk20a *g, dma_addr_t iova) 2250u64 gk20a_mm_smmu_vaddr_translate(struct gk20a *g, dma_addr_t iova)
2251{ 2251{
2252 if (!device_is_iommuable(dev_from_gk20a(g))) 2252 if (!device_is_iommuable(dev_from_gk20a(g)) || !g->mm.has_physical_mode)
2253 return iova; 2253 return iova;
2254 else 2254 else
2255 return iova | 1ULL << g->ops.mm.get_physical_addr_bits(g); 2255 return iova | 1ULL << g->ops.mm.get_physical_addr_bits(g);
@@ -3382,6 +3382,17 @@ void gk20a_free_inst_block(struct gk20a *g, struct mem_desc *inst_block)
3382 gk20a_gmmu_free(g, inst_block); 3382 gk20a_gmmu_free(g, inst_block);
3383} 3383}
3384 3384
3385u64 gk20a_mm_inst_block_addr(struct gk20a *g, struct mem_desc *inst_block)
3386{
3387 u64 addr;
3388 if (g->mm.has_physical_mode)
3389 addr = gk20a_mem_phys(inst_block);
3390 else
3391 addr = gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(inst_block->sgt->sgl));
3392
3393 return addr;
3394}
3395
3385static int gk20a_init_bar1_vm(struct mm_gk20a *mm) 3396static int gk20a_init_bar1_vm(struct mm_gk20a *mm)
3386{ 3397{
3387 int err; 3398 int err;
@@ -3484,11 +3495,10 @@ void gk20a_init_inst_block(struct mem_desc *inst_block, struct vm_gk20a *vm,
3484{ 3495{
3485 struct gk20a *g = gk20a_from_vm(vm); 3496 struct gk20a *g = gk20a_from_vm(vm);
3486 u64 pde_addr = g->ops.mm.get_iova_addr(g, vm->pdb.sgt->sgl, 0); 3497 u64 pde_addr = g->ops.mm.get_iova_addr(g, vm->pdb.sgt->sgl, 0);
3487 phys_addr_t inst_pa = gk20a_mem_phys(inst_block);
3488 void *inst_ptr = inst_block->cpu_va; 3498 void *inst_ptr = inst_block->cpu_va;
3489 3499
3490 gk20a_dbg_info("inst block phys = 0x%llx, kv = 0x%p", 3500 gk20a_dbg_info("inst block phys = 0x%llx, kv = 0x%p",
3491 (u64)inst_pa, inst_ptr); 3501 gk20a_mm_inst_block_addr(g, inst_block), inst_ptr);
3492 3502
3493 gk20a_dbg_info("pde pa=0x%llx", (u64)pde_addr); 3503 gk20a_dbg_info("pde pa=0x%llx", (u64)pde_addr);
3494 3504