gpu: nvgpu: Fix wmb() order in pramin access

wmb() should come after the writes to ensure that the writes have
completed before progressing.

Bug 1811382

Change-Id: I98fba317b1760240c0b5de531accf398fe69c9b3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
(cherry picked from commit 1b1201b9c109061590e6e25260d7230ae2c89888)
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1225251
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 10 insertions, 10 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index ff9bb5e2..0c1c6d8f 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -229,17 +229,17 @@ static inline void pramin_access_batch_wr_n(struct gk20a *g, u32 start,
 {
         u32 r = start, *src_u32 = *arg;
 
+        while (words--) {
+                writel_relaxed(*src_u32++, g->regs + r);
+                r += sizeof(u32);
+        }
+
         /*
          * Barrier moved here from gk20a_writel in the loop. The writes don't
          * have to be ordered.
          */
         wmb();
 
-        while (words--) {
-                writel_relaxed(*src_u32++, g->regs + r);
-                r += sizeof(u32);
-        }
-
         *arg = src_u32;
 }
 
@@ -248,16 +248,16 @@ static inline void pramin_access_batch_set(struct gk20a *g, u32 start,
 {
         u32 r = start, repeat = **arg;
 
+        while (words--) {
+                writel_relaxed(repeat, g->regs + r);
+                r += sizeof(u32);
+        }
+
         /*
          * Barrier moved here from gk20a_writel in the loop. The writes don't
          * have to be ordered.
          */
         wmb();
-
-        while (words--) {
-                writel_relaxed(repeat, g->regs + r);
-                r += sizeof(u32);
-        }
 }
 
 u32 gk20a_mem_rd32(struct gk20a *g, struct mem_desc *mem, u32 w)