gpu: nvgpu: fix alignment calculation

consider buffer size as well when calculating the required alignment
for a buffer else we would be mapping a VA range greater than requested
thus allowing access to entire large page even when not needed creating
a security hole.

Bug 1492689

Change-Id: Ic404708d238621ea64c26cafd05bc30ba8e02e12
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/793229
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index b12091bf..37151cda 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -1423,7 +1423,7 @@ u64 gk20a_vm_map(struct vm_gk20a *vm,
                         sgl = sg_next(sgl);
                 }
         } else
-                bfr.align = 1 << __ffs(buf_addr);
+                bfr.align = 1 << __ffs(buf_addr | bfr.size);
 
         bfr.pgsz_idx = -1;
         mapping_size = mapping_size ? mapping_size : bfr.size;