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authorNicolas Benech <nbenech@nvidia.com>2018-08-27 10:56:19 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-07 00:33:41 -0400
commit0e58ebaae13dd59b6aba5297f898e7c89fcd2742 (patch)
treea012357b1f9d3a5007c192c7e1377759f71a5a10 /drivers/gpu/nvgpu/gk20a/mc_gk20a.c
parent034e23c197541e0e8ac6a4d95b1d3b6d1be885cd (diff)
gpu: nvgpu: Fix nvgpu_readl MISRA 17.7 violations
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fix for calls to nvgpu_readl. JIRA NVGPU-677 Change-Id: I432197cca67a10281dfe407aa9ce2dd8120030f0 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1807528 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mc_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mc_gk20a.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
index f7631a9c..f9996e71 100644
--- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
@@ -172,7 +172,7 @@ void mc_gk20a_intr_stall_pause(struct gk20a *g)
172 mc_intr_en_0_inta_disabled_f()); 172 mc_intr_en_0_inta_disabled_f());
173 173
174 /* flush previous write */ 174 /* flush previous write */
175 gk20a_readl(g, mc_intr_en_0_r()); 175 (void) gk20a_readl(g, mc_intr_en_0_r());
176} 176}
177 177
178void mc_gk20a_intr_stall_resume(struct gk20a *g) 178void mc_gk20a_intr_stall_resume(struct gk20a *g)
@@ -181,7 +181,7 @@ void mc_gk20a_intr_stall_resume(struct gk20a *g)
181 mc_intr_en_0_inta_hardware_f()); 181 mc_intr_en_0_inta_hardware_f());
182 182
183 /* flush previous write */ 183 /* flush previous write */
184 gk20a_readl(g, mc_intr_en_0_r()); 184 (void) gk20a_readl(g, mc_intr_en_0_r());
185} 185}
186 186
187void mc_gk20a_intr_nonstall_pause(struct gk20a *g) 187void mc_gk20a_intr_nonstall_pause(struct gk20a *g)
@@ -190,7 +190,7 @@ void mc_gk20a_intr_nonstall_pause(struct gk20a *g)
190 mc_intr_en_0_inta_disabled_f()); 190 mc_intr_en_0_inta_disabled_f());
191 191
192 /* flush previous write */ 192 /* flush previous write */
193 gk20a_readl(g, mc_intr_en_1_r()); 193 (void) gk20a_readl(g, mc_intr_en_1_r());
194} 194}
195 195
196void mc_gk20a_intr_nonstall_resume(struct gk20a *g) 196void mc_gk20a_intr_nonstall_resume(struct gk20a *g)
@@ -199,7 +199,7 @@ void mc_gk20a_intr_nonstall_resume(struct gk20a *g)
199 mc_intr_en_0_inta_hardware_f()); 199 mc_intr_en_0_inta_hardware_f());
200 200
201 /* flush previous write */ 201 /* flush previous write */
202 gk20a_readl(g, mc_intr_en_1_r()); 202 (void) gk20a_readl(g, mc_intr_en_1_r());
203} 203}
204 204
205u32 mc_gk20a_intr_stall(struct gk20a *g) 205u32 mc_gk20a_intr_stall(struct gk20a *g)