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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-03-17 12:55:43 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-20 19:40:02 -0400
commit866fee02478eb9db7978a81618b601eb717d4799 (patch)
tree119d9db1a65266ef758b2a925bbd20bae557a2c1 /drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
parent74fe1caa2b56aab24c17ad4dd2524128fc237894 (diff)
gpu: nvgpu: Remove ELPG_FLUSH
ELPG_FLUSH is not accessible in later GPUs, so we stopped using it and instead do explicit CBC and L2 flushes. Delete the unused function op and backing code. Change-Id: Ic3eb97f2d32ea8fdbe5ec57bd9254268caaf9935 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323236 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ltc_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ltc_gk20a.c39
1 files changed, 0 insertions, 39 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index 5db48ae7..34a96971 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -189,44 +189,6 @@ static void gk20a_ltc_isr(struct gk20a *g)
189 gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr); 189 gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr);
190} 190}
191 191
192/* Flushes the compression bit cache as well as "data".
193 * Note: the name here is a bit of a misnomer. ELPG uses this
194 * internally... but ELPG doesn't have to be on to do it manually.
195 */
196static void gk20a_mm_g_elpg_flush_locked(struct gk20a *g)
197{
198 u32 data;
199 s32 retry = 100;
200
201 gk20a_dbg_fn("");
202
203 trace_gk20a_mm_g_elpg_flush_locked(dev_name(g->dev));
204
205 /* Make sure all previous writes are committed to the L2. There's no
206 guarantee that writes are to DRAM. This will be a sysmembar internal
207 to the L2. */
208 gk20a_writel(g, ltc_ltcs_ltss_g_elpg_r(),
209 ltc_ltcs_ltss_g_elpg_flush_pending_f());
210 do {
211 data = gk20a_readl(g, ltc_ltc0_ltss_g_elpg_r());
212
213 if (ltc_ltc0_ltss_g_elpg_flush_v(data) ==
214 ltc_ltc0_ltss_g_elpg_flush_pending_v()) {
215 gk20a_dbg_info("g_elpg_flush 0x%x", data);
216 retry--;
217 udelay(5);
218 } else
219 break;
220 } while (retry >= 0 || !tegra_platform_is_silicon());
221
222 if (tegra_platform_is_silicon() && retry < 0)
223 gk20a_warn(dev_from_gk20a(g),
224 "g_elpg_flush too many retries");
225
226 trace_gk20a_mm_g_elpg_flush_locked_done(dev_name(g->dev));
227
228}
229
230static int gk20a_determine_L2_size_bytes(struct gk20a *g) 192static int gk20a_determine_L2_size_bytes(struct gk20a *g)
231{ 193{
232 u32 lts_per_ltc; 194 u32 lts_per_ltc;
@@ -279,7 +241,6 @@ void gk20a_init_ltc(struct gpu_ops *gops)
279#ifdef CONFIG_DEBUG_FS 241#ifdef CONFIG_DEBUG_FS
280 gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs; 242 gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs;
281#endif 243#endif
282 gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked;
283 gops->ltc.init_fs_state = gk20a_ltc_init_fs_state; 244 gops->ltc.init_fs_state = gk20a_ltc_init_fs_state;
284 gops->ltc.isr = gk20a_ltc_isr; 245 gops->ltc.isr = gk20a_ltc_isr;
285} 246}