gpu: nvgpu: gk20a, gm20b headers

update headers from latest gen_register/ip_check info

Change-Id: Iae892ab7138e7bba4abc821b9d7893e768647daa
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/399382

1 files changed, 24 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
index 1692bb54..479db499 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h
@@ -110,14 +110,6 @@ static inline u32 mc_intr_mask_0_pmu_enabled_f(void)
 {
         return 0x1000000;
 }
-static inline u32 mc_intr_mask_1_r(void)
-{
-        return 0x00000644;
-}
-static inline u32 mc_intr_mask_1_pmu_enabled_f(void)
-{
-        return 0x1000000;
-}
 static inline u32 mc_intr_en_0_r(void)
 {
         return 0x00000140;
@@ -130,6 +122,30 @@ static inline u32 mc_intr_en_0_inta_hardware_f(void)
 {
         return 0x1;
 }
+static inline u32 mc_intr_mask_1_r(void)
+{
+        return 0x00000644;
+}
+static inline u32 mc_intr_mask_1_pmu_s(void)
+{
+        return 1;
+}
+static inline u32 mc_intr_mask_1_pmu_f(u32 v)
+{
+        return (v & 0x1) << 24;
+}
+static inline u32 mc_intr_mask_1_pmu_m(void)
+{
+        return 0x1 << 24;
+}
+static inline u32 mc_intr_mask_1_pmu_v(u32 r)
+{
+        return (r >> 24) & 0x1;
+}
+static inline u32 mc_intr_mask_1_pmu_enabled_f(void)
+{
+        return 0x1000000;
+}
 static inline u32 mc_intr_en_1_r(void)
 {
         return 0x00000144;