diff options
author | Mayank Kaushik <mkaushik@nvidia.com> | 2014-05-19 17:00:13 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:53 -0400 |
commit | 04efcaf97ee08a460deee192134ba30402c577be (patch) | |
tree | ebc478e4bd28030237def8ebaa86bf69e7aa8df7 /drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |
parent | 87373abc9598bf5c57f429ea246497d3019a6034 (diff) |
gpu: nvgpu: Add support for multiple GPC/TPCs
Add support for multiple GPCs/TPCs to the GPC/TPC
exception handling code.
Change-Id: Ifb4b53a016e90cb54c4d985a9e17760f87c6046f
Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/411660
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index 9f1fb32b..f18e19be 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -2790,51 +2790,51 @@ static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_single_step_complet | |||
2790 | { | 2790 | { |
2791 | return 0x40; | 2791 | return 0x40; |
2792 | } | 2792 | } |
2793 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_r(void) | 2793 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_r(void) |
2794 | { | 2794 | { |
2795 | return 0x0050450c; | 2795 | return 0x00419d0c; |
2796 | } | 2796 | } |
2797 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_sm_enabled_f(void) | 2797 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_sm_enabled_f(void) |
2798 | { | 2798 | { |
2799 | return 0x2; | 2799 | return 0x2; |
2800 | } | 2800 | } |
2801 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_sm_disabled_f(void) | 2801 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_r(void) |
2802 | { | 2802 | { |
2803 | return 0x0; | 2803 | return 0x0050450c; |
2804 | } | 2804 | } |
2805 | static inline u32 gr_gpc0_gpccs_gpc_exception_en_r(void) | 2805 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_sm_enabled_f(void) |
2806 | { | 2806 | { |
2807 | return 0x00502c94; | 2807 | return 0x2; |
2808 | } | 2808 | } |
2809 | static inline u32 gr_gpc0_gpccs_gpc_exception_en_tpc_0_enabled_f(void) | 2809 | static inline u32 gr_gpcs_gpccs_gpc_exception_en_r(void) |
2810 | { | 2810 | { |
2811 | return 0x10000; | 2811 | return 0x0041ac94; |
2812 | } | 2812 | } |
2813 | static inline u32 gr_gpc0_gpccs_gpc_exception_en_tpc_0_disabled_f(void) | 2813 | static inline u32 gr_gpcs_gpccs_gpc_exception_en_tpc_f(u32 v) |
2814 | { | 2814 | { |
2815 | return 0x0; | 2815 | return (v & 0xff) << 16; |
2816 | } | 2816 | } |
2817 | static inline u32 gr_gpcs_gpccs_gpc_exception_r(void) | 2817 | static inline u32 gr_gpc0_gpccs_gpc_exception_r(void) |
2818 | { | 2818 | { |
2819 | return 0x0041ac90; | 2819 | return 0x00502c90; |
2820 | } | 2820 | } |
2821 | static inline u32 gr_gpcs_gpccs_gpc_exception_tpc_v(u32 r) | 2821 | static inline u32 gr_gpc0_gpccs_gpc_exception_tpc_v(u32 r) |
2822 | { | 2822 | { |
2823 | return (r >> 16) & 0xff; | 2823 | return (r >> 16) & 0xff; |
2824 | } | 2824 | } |
2825 | static inline u32 gr_gpcs_gpccs_gpc_exception_tpc_0_pending_v(void) | 2825 | static inline u32 gr_gpc0_gpccs_gpc_exception_tpc_0_pending_v(void) |
2826 | { | 2826 | { |
2827 | return 0x00000001; | 2827 | return 0x00000001; |
2828 | } | 2828 | } |
2829 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_r(void) | 2829 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_r(void) |
2830 | { | 2830 | { |
2831 | return 0x00419d08; | 2831 | return 0x00504508; |
2832 | } | 2832 | } |
2833 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_sm_v(u32 r) | 2833 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_sm_v(u32 r) |
2834 | { | 2834 | { |
2835 | return (r >> 1) & 0x1; | 2835 | return (r >> 1) & 0x1; |
2836 | } | 2836 | } |
2837 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_sm_pending_v(void) | 2837 | static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_sm_pending_v(void) |
2838 | { | 2838 | { |
2839 | return 0x00000001; | 2839 | return 0x00000001; |
2840 | } | 2840 | } |