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| author | Alex Frid <afrid@nvidia.com> | 2014-07-26 22:12:19 -0400 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:38 -0400 |
| commit | 8554e9a9c8ba67835d023da2a9148a5af5db2b17 (patch) | |
| tree | c372beff66edf6e3edbc789b7263cdbbfd3e2b27 /drivers/gpu/nvgpu/gk20a/hal.h | |
| parent | 40bab00bf706d14914c0ca80a234b9979217453f (diff) | |
gpu: nvgpu: Update GM20B GPCPLL programming sequence
Updated GM20B GPCPLL programming sequence to utilize new glitch-less
post divider:
- No longer bypass PLL for re-locking if it is already enabled, and
post divider as well as feedback divider are changing (input divider
change is still under bypass only).
- Use post divider instead of external linear divider to introduce
(VCO min/2) intermediated step when changing PLL frequency.
Bug 1450787
Signed-off-by: Alex Frid <afrid@nvidia.com>
Change-Id: I4fe60f8eb0d8e59002b641a6bfb29a53467dc8ce
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/hal.h')
0 files changed, 0 insertions, 0 deletions