diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-10-27 05:06:59 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:54 -0400 |
commit | 2d5ff668cbc6a932df2c9cf79627d1d340e5c2c0 (patch) | |
tree | 1d9bc4b774a9c2cea339891eaef3af5b87ee354d /drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h | |
parent | 23a182aaa61d120c965f1bce09609cc14d4e14eb (diff) |
gpu: nvgpu: GR and LTC HAL to use const structs
Convert GR and LTC HALs to use const structs, and initialize them
with macros.
Bug 1567274
Change-Id: Ia3f24a5eccb27578d9cba69755f636818d11275c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590371
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h new file mode 100644 index 00000000..df0cf020 --- /dev/null +++ b/drivers/gpu/nvgpu/gk20a/gr_ops_gk20a.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /* | ||
2 | * GPK20A GPU graphics ops | ||
3 | * | ||
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef _GR_OPS_GK20A_H_ | ||
17 | #define _GR_OPS_GK20A_H_ | ||
18 | |||
19 | #include "gr_ops.h" | ||
20 | |||
21 | #define __gr_gk20a_op(X) gr_gk20a_ ## X | ||
22 | #define __set_gr_gk20a_op(X) . X = gr_gk20a_ ## X | ||
23 | |||
24 | int __gr_gk20a_op(init_fs_state)(struct gk20a *); | ||
25 | void __gr_gk20a_op(access_smpc_reg)(struct gk20a *, u32, u32); | ||
26 | void __gr_gk20a_op(bundle_cb_defaults)(struct gk20a *); | ||
27 | void __gr_gk20a_op(cb_size_default)(struct gk20a *); | ||
28 | int __gr_gk20a_op(calc_global_ctx_buffer_size)(struct gk20a *); | ||
29 | void __gr_gk20a_op(commit_global_attrib_cb)(struct gk20a *, | ||
30 | struct channel_ctx_gk20a *, u64 , bool); | ||
31 | void __gr_gk20a_op(commit_global_bundle_cb)(struct gk20a *, | ||
32 | struct channel_ctx_gk20a *, u64, u64, bool); | ||
33 | int __gr_gk20a_op(commit_global_cb_manager)(struct gk20a *, | ||
34 | struct channel_gk20a *, bool); | ||
35 | void __gr_gk20a_op(commit_global_pagepool)(struct gk20a *, | ||
36 | struct channel_ctx_gk20a *, u64 , u32, bool); | ||
37 | void __gr_gk20a_op(init_gpc_mmu)(struct gk20a *); | ||
38 | int __gr_gk20a_op(handle_sw_method)(struct gk20a *, u32 , u32, u32, u32); | ||
39 | void __gr_gk20a_op(set_alpha_circular_buffer_size)(struct gk20a *, u32); | ||
40 | void __gr_gk20a_op(set_circular_buffer_size)(struct gk20a *, u32); | ||
41 | void __gr_gk20a_op(enable_hww_exceptions)(struct gk20a *); | ||
42 | bool __gr_gk20a_op(is_valid_class)(struct gk20a *, u32); | ||
43 | void __gr_gk20a_op(get_sm_dsm_perf_regs)(struct gk20a *, u32 *, u32 **, u32 *); | ||
44 | void __gr_gk20a_op(get_sm_dsm_perf_ctrl_regs)(struct gk20a *, | ||
45 | u32 *, u32 **, u32 *); | ||
46 | void __gr_gk20a_op(set_hww_esr_report_mask)(struct gk20a *); | ||
47 | int __gr_gk20a_op(setup_alpha_beta_tables)(struct gk20a *, struct gr_gk20a *); | ||
48 | int __gr_gk20a_op(falcon_load_ucode)(struct gk20a *, u64, | ||
49 | struct gk20a_ctxsw_ucode_segments *, u32); | ||
50 | int __gr_gk20a_op(load_ctxsw_ucode)(struct gk20a *); | ||
51 | u32 __gr_gk20a_op(get_gpc_tpc_mask)(struct gk20a *, u32); | ||
52 | void __gr_gk20a_op(free_channel_ctx)(struct channel_gk20a *); | ||
53 | int __gr_gk20a_op(alloc_obj_ctx)(struct channel_gk20a *c, | ||
54 | struct nvgpu_alloc_obj_ctx_args *); | ||
55 | int __gr_gk20a_op(free_obj_ctx)(struct channel_gk20a *c, | ||
56 | struct nvgpu_free_obj_ctx_args *); | ||
57 | int __gr_gk20a_op(bind_ctxsw_zcull)(struct gk20a *, | ||
58 | struct gr_gk20a *, struct channel_gk20a *, u64, u32); | ||
59 | int __gr_gk20a_op(get_zcull_info)(struct gk20a *, | ||
60 | struct gr_gk20a *, struct gr_zcull_info *); | ||
61 | |||
62 | #endif | ||