gpu: nvgpu: force clean patch ctx begin/end

This patch_context map/unmap pair has become a mere wrapper for the more
general gk20a_mem_{begin,end}(). To be consistent about mappings,
require that each patch_write is surrounded by an explicit begin/end
pair, instead of relying on possible inefficient per-write map/unmap.

Remove also the cpu_va check from .._write_end() since the buffers may
be exist in vidmem without a cpu mapping.

JIRA DNVGPU-24

Change-Id: Ia05d52d3d712f2d63730eedc078845fde3e217c1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1157298
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 189994ef..ad6d8049 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -530,11 +530,11 @@ int gr_gk20a_update_hwpm_ctxsw_mode(struct gk20a *g,
                                   bool enable_hwpm_ctxsw);
 
 struct channel_ctx_gk20a;
-int gr_gk20a_ctx_patch_write(struct gk20a *g, struct channel_ctx_gk20a *ch_ctx,
+void gr_gk20a_ctx_patch_write(struct gk20a *g, struct channel_ctx_gk20a *ch_ctx,
                                     u32 addr, u32 data, bool patch);
 int gr_gk20a_ctx_patch_write_begin(struct gk20a *g,
                                           struct channel_ctx_gk20a *ch_ctx);
-int gr_gk20a_ctx_patch_write_end(struct gk20a *g,
+void gr_gk20a_ctx_patch_write_end(struct gk20a *g,
                                         struct channel_ctx_gk20a *ch_ctx);
 void gr_gk20a_commit_global_pagepool(struct gk20a *g,
                                      struct channel_ctx_gk20a *ch_ctx,