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authorSeema Khowala <seemaj@nvidia.com>2017-05-03 16:36:42 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-30 11:43:35 -0400
commit68300d9c027acd4263d56ede497c3dce50625e61 (patch)
treea5990d16148849665849ba7684a7fbbaf85e88b1 /drivers/gpu/nvgpu/gk20a/gr_gk20a.h
parent351793947ba6db2cc382962818680e9858959b86 (diff)
gpu: nvgpu: add enable_exceptions gr ops
This is needed to enable chip specific gr exceptions JIRA GPUT19X-75 Change-Id: I5ca8d0e51d00947c3ab1675bb6331207def433a4 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1474851 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index c1fba235..79aeb42f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -710,6 +710,7 @@ int gr_gk20a_resume_contexts(struct gk20a *g,
710 struct dbg_session_gk20a *dbg_s, 710 struct dbg_session_gk20a *dbg_s,
711 int *ctx_resident_ch_fd); 711 int *ctx_resident_ch_fd);
712void gk20a_gr_enable_gpc_exceptions(struct gk20a *g); 712void gk20a_gr_enable_gpc_exceptions(struct gk20a *g);
713void gk20a_gr_enable_exceptions(struct gk20a *g);
713int gr_gk20a_inval_icache(struct gk20a *g, struct channel_gk20a *ch); 714int gr_gk20a_inval_icache(struct gk20a *g, struct channel_gk20a *ch);
714int gr_gk20a_trigger_suspend(struct gk20a *g); 715int gr_gk20a_trigger_suspend(struct gk20a *g);
715int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state); 716int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state);