gpu: nvgpu: add resume_all_sms gr ops

This is required to support multiple SM and t19x
sm register address changes

JIRA GPUT19X-75

Change-Id: I844b5cf02a75ba397891a1100d917875e5a3e181
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512217
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 659b37a6..5a28deea 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -614,7 +614,7 @@ int gr_gk20a_disable_ctxsw(struct gk20a *g);
 int gr_gk20a_enable_ctxsw(struct gk20a *g);
 void gk20a_gr_resume_single_sm(struct gk20a *g,
                 u32 gpc, u32 tpc, u32 sm);
-void gk20a_resume_all_sms(struct gk20a *g);
+void gk20a_gr_resume_all_sms(struct gk20a *g);
 void gk20a_gr_suspend_single_sm(struct gk20a *g,
                 u32 gpc, u32 tpc, u32 sm,
                 u32 global_esr_mask, bool check_errors);