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authorDebarshi Dutta <ddutta@nvidia.com>2017-11-13 03:21:48 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-23 06:03:36 -0500
commit536ec21b565ab1368b53a26d6ec7ed05857f0775 (patch)
tree5f385385ae730dd2d98463502d249150262f8b9b /drivers/gpu/nvgpu/gk20a/gr_gk20a.h
parentba2e59dc41f593bb011e0ec58c969337a35f4cf1 (diff)
gpu: nvgpu: remove dependency on linux header for regops_gk20a*
This patch removes the dependency on the header file "uapi/linux/nvgpu.h" for regops_gk20a.c. The original structure and definitions in the uapi/linux/nvgpu.h is maintained for userspace libnvrm_gpu.h. The following changes are made in this patch. 1) Defined common versions of the NVGPU_DBG_GPU_REG_OP* definitions inside regops_gk20a.h. 2) Defined common version of struct nvgpu_dbg_gpu_reg_op inside regops_gk20a.h naming it struct nvgpu_dbg_reg_op. 3) Constructed APIs to convert the NVGPU_DBG_GPU_REG_OP* definitions from linux versions to common and vice versa. 4) Constructed APIs to convert from struct nvgpu_dbg_gpu_reg_op to struct nvgpu_dbg_reg_op and vice versa. 5) The ioctl handler nvgpu_ioctl_channel_reg_ops first copies from userspace into a local storage based on struct nvgpu_dbg_gpu_reg_op which is copied into the struct nvgpu_dbg_reg_op using the APIs above and after executing the regops handler passes the data back into userspace by copying back data from struct nvgpu_dbg_reg_op to struct nvgpu_dbg_gpu_reg_opi. JIRA NVGPU-417 Change-Id: I23bad48d2967a629a6308c7484f3741a89db6537 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1596972 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 0df88988..5a5809fc 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -604,12 +604,12 @@ u32 gk20a_gr_get_sm_no_lock_down_hww_global_esr_mask(struct gk20a *g);
604 604
605int gk20a_gr_suspend(struct gk20a *g); 605int gk20a_gr_suspend(struct gk20a *g);
606 606
607struct nvgpu_dbg_gpu_reg_op; 607struct nvgpu_dbg_reg_op;
608int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch, 608int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
609 struct nvgpu_dbg_gpu_reg_op *ctx_ops, u32 num_ops, 609 struct nvgpu_dbg_reg_op *ctx_ops, u32 num_ops,
610 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops); 610 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops);
611int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch, 611int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
612 struct nvgpu_dbg_gpu_reg_op *ctx_ops, u32 num_ops, 612 struct nvgpu_dbg_reg_op *ctx_ops, u32 num_ops,
613 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops, 613 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops,
614 bool ch_is_curr_ctx); 614 bool ch_is_curr_ctx);
615int gr_gk20a_get_ctx_buffer_offsets(struct gk20a *g, 615int gr_gk20a_get_ctx_buffer_offsets(struct gk20a *g,