gpu: nvgpu: add suspend_all_sms gr ops

This is required to support multiple SM and t19x
sm register address changes

JIRA GPUT19X-75

Change-Id: Icdae3b6ed67a3d3deeb17f29528184b2d7a70af5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512215
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index a9b7c2d7..90abcf22 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -618,8 +618,9 @@ void gk20a_resume_all_sms(struct gk20a *g);
 void gk20a_gr_suspend_single_sm(struct gk20a *g,
                 u32 gpc, u32 tpc, u32 sm,
                 u32 global_esr_mask, bool check_errors);
-void gk20a_suspend_all_sms(struct gk20a *g,
+void gk20a_gr_suspend_all_sms(struct gk20a *g,
                 u32 global_esr_mask, bool check_errors);
+u32 gr_gk20a_get_tpc_count(struct gr_gk20a *gr, u32 gpc_index);
 int gk20a_gr_lock_down_sm(struct gk20a *g,
                                  u32 gpc, u32 tpc, u32 global_esr_mask,
                                  bool check_errors);