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authorTimo Alho <talho@nvidia.com>2017-11-03 08:29:12 -0400
committerJani Uusi-Rantala <juusirantala@nvidia.com>2017-11-03 11:36:50 -0400
commitfe1e09d473044f7caaf8b834a094f4784bc5f5e1 (patch)
treea8ec4ae3c1f1c136012317ee09cc178ffe0280d8 /drivers/gpu/nvgpu/gk20a/gr_gk20a.c
parentde399ccb0019513a5f9e8f2bcadb02486f99bc80 (diff)
Revert "gpu: nvgpu: fix patch buf count update for vidmem"
This reverts commit de399ccb0019513a5f9e8f2bcadb02486f99bc80. Bug 2012077 Change-Id: Ie608c3b41aa91f9aaed3fad240ed882a0c6f1ea2 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591423 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 06fb5497..2a20c2d9 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -682,7 +682,7 @@ int gr_gk20a_ctx_patch_write_begin(struct gk20a *g,
682 if (err) 682 if (err)
683 return err; 683 return err;
684 684
685 if (nvgpu_mem_cpu_accessible(&ch_ctx->gr_ctx->mem)) { 685 if (ch_ctx->gr_ctx->mem.cpu_va) {
686 /* reset patch count if ucode has already processed it */ 686 /* reset patch count if ucode has already processed it */
687 ch_ctx->patch_ctx.data_count = nvgpu_mem_rd(g, 687 ch_ctx->patch_ctx.data_count = nvgpu_mem_rd(g,
688 &ch_ctx->gr_ctx->mem, 688 &ch_ctx->gr_ctx->mem,
@@ -699,7 +699,7 @@ void gr_gk20a_ctx_patch_write_end(struct gk20a *g,
699 nvgpu_mem_end(g, &ch_ctx->patch_ctx.mem); 699 nvgpu_mem_end(g, &ch_ctx->patch_ctx.mem);
700 700
701 /* Write context count to context image if it is mapped */ 701 /* Write context count to context image if it is mapped */
702 if (nvgpu_mem_cpu_accessible(&ch_ctx->gr_ctx->mem)) { 702 if (ch_ctx->gr_ctx->mem.cpu_va) {
703 nvgpu_mem_wr(g, &ch_ctx->gr_ctx->mem, 703 nvgpu_mem_wr(g, &ch_ctx->gr_ctx->mem,
704 ctxsw_prog_main_image_patch_count_o(), 704 ctxsw_prog_main_image_patch_count_o(),
705 ch_ctx->patch_ctx.data_count); 705 ch_ctx->patch_ctx.data_count);