gpu: nvgpu: Move ELCG programming to therm

Move ELCG parameter programming to a new function in therm,
elcg_init_idle_filter. Implement gk20a variant and use it for gk20a
and gm20b.

JIRA DNVGPU-74

Change-Id: I8ef400f3a6195311fb9e7da8db6c34993d62f461
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1220433
(cherry picked from commit f6654ae4d83d31cd40b317bf55922964bbfa575d)
Reviewed-on: http://git-master/r/1239421
GVS: Gerrit_Virtual_Submit

1 files changed, 1 insertions, 24 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index fc1978ed..ecc67167 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4232,8 +4232,7 @@ void gr_gk20a_init_blcg_mode(struct gk20a *g, u32 mode, u32 engine)
 
 void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine)
 {
-        u32 gate_ctrl, idle_filter;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
+        u32 gate_ctrl;
 
         gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(engine));
 
@@ -4262,29 +4261,7 @@ void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine)
                         "invalid elcg mode %d", mode);
         }
 
-        if (platform->is_fmodel) {
-                gate_ctrl = set_field(gate_ctrl,
-                        therm_gate_ctrl_eng_delay_after_m(),
-                        therm_gate_ctrl_eng_delay_after_f(4));
-        }
-
-        /* 2 * (1 << 9) = 1024 clks */
-        gate_ctrl = set_field(gate_ctrl,
-                therm_gate_ctrl_eng_idle_filt_exp_m(),
-                therm_gate_ctrl_eng_idle_filt_exp_f(9));
-        gate_ctrl = set_field(gate_ctrl,
-                therm_gate_ctrl_eng_idle_filt_mant_m(),
-                therm_gate_ctrl_eng_idle_filt_mant_f(2));
         gk20a_writel(g, therm_gate_ctrl_r(engine), gate_ctrl);
-
-        /* default fecs_idle_filter to 0 */
-        idle_filter = gk20a_readl(g, therm_fecs_idle_filter_r());
-        idle_filter &= ~therm_fecs_idle_filter_value_m();
-        gk20a_writel(g, therm_fecs_idle_filter_r(), idle_filter);
-        /* default hubmmu_idle_filter to 0 */
-        idle_filter = gk20a_readl(g, therm_hubmmu_idle_filter_r());
-        idle_filter &= ~therm_hubmmu_idle_filter_value_m();
-        gk20a_writel(g, therm_hubmmu_idle_filter_r(), idle_filter);
 }
 
 void gr_gk20a_init_cg_mode(struct gk20a *g, u32 cgmode, u32 mode_config)