gpu: nvgpu: channel: make chid u32

The chid member of the channel_gk20a struct was being used as a unsigned
value. By being declared as an int, it was causing MISRA 10.3 violations
for implicit assignment of different types.

JIRA NVGPU-647

Change-Id: I7477fad6f0c837cf7ede1dba803158b1dda717af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918470
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 1c7bb9b538200a11aa3ef31d72038d8ba820dfca in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2008514
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 20c13097..8cb66279 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -8067,7 +8067,7 @@ bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch)
         nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
                   "curr_gr_chid=%d curr_tsgid=%d, ch->tsgid=%d"
                   " ch->chid=%d",
-                  (curr_ch != NULL) ? curr_ch->chid : -1,
+                  (curr_ch != NULL) ? curr_ch->chid : U32_MAX,
                   curr_gr_tsgid,
                   ch->tsgid,
                   ch->chid);