gpu: nvgpu: Reset channel on SM exception

If we receive an exception without debugger attached, trigger
a fault recovery.

Change-Id: I8c02e37eb7fb0cba2fcb7afed7beb26b86f38d9e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1026003
(cherry picked from commit 526eef512eaed1c6472677eddec051541a939d63)
Reviewed-on: http://git-master/r/1026002
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

1 files changed, 9 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index f0e89f8a..7e37a965 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5285,6 +5285,15 @@ int gr_gk20a_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc,
         warp_esr = gk20a_readl(g, gr_gpc0_tpc0_sm_hww_warp_esr_r() + offset);
         warp_esr = g->ops.gr.mask_hww_warp_esr(warp_esr);
 
+        if (!sm_debugger_attached) {
+                gk20a_err(dev_from_gk20a(g), "sm hww global %08x warp %08x\n",
+                          global_esr, warp_esr);
+                return -EFAULT;
+        }
+
+        gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg,
+                  "sm hww global %08x warp %08x", global_esr, warp_esr);
+
         if (g->ops.gr.pre_process_sm_exception) {
                 ret = g->ops.gr.pre_process_sm_exception(g, gpc, tpc,
                                 global_esr, warp_esr,