diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2017-11-06 08:44:23 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-27 12:23:11 -0500 |
commit | c6b9177cfff8a41c3c3c78f5c47c7df677ced58c (patch) | |
tree | b402ccda611d85ec88f8557cb26d949617d92466 /drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |
parent | a0cea295e7b7f917c6b52221ab34c3a6111fb224 (diff) |
gpu: nvgpu: define error_notifiers in common code
All the linux specific error_notifier codes are defined in linux specific
header file <uapi/linux/nvgpu.h> and used in all the common driver
But since they are defined in linux specific file, we need to move all the
uses of those error_notifiers in linux specific code only
Hence define new error_notifiers in include/nvgpu/error_notifier.h and
use them in the common code
Add new API nvgpu_error_notifier_to_channel_notifier() to convert common
error_notifier of the form NVGPU_ERR_NOTIFIER_* to linux specific error
notifier of the form NVGPU_CHANNEL_*
Any future additions to error notifiers requires update to both the form
of error notifiers
Move all error notifier related metadata from channel_gk20a (common code)
to linux specific structure nvgpu_channel_linux
Update all accesses to this data from new structure instead of channel_gk20a
Move and rename below APIs to linux specific file and declare them
in error_notifier.h
nvgpu_set_error_notifier_locked()
nvgpu_set_error_notifier()
nvgpu_is_error_notifier_set()
Add below new API and use it in fifo_vgpu.c
nvgpu_set_error_notifier_if_empty()
Include <nvgpu/error_notifier.h> wherever new error_notifier codes are used
NVGPU-426
Change-Id: Iaa5bfc150e6e9ec17d797d445c2d6407afe9f4bd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1593361
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 270d36d6..b3969b60 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <nvgpu/barrier.h> | 40 | #include <nvgpu/barrier.h> |
41 | #include <nvgpu/mm.h> | 41 | #include <nvgpu/mm.h> |
42 | #include <nvgpu/ctxsw_trace.h> | 42 | #include <nvgpu/ctxsw_trace.h> |
43 | #include <nvgpu/error_notifier.h> | ||
43 | 44 | ||
44 | #include "gk20a.h" | 45 | #include "gk20a.h" |
45 | #include "gr_ctx_gk20a.h" | 46 | #include "gr_ctx_gk20a.h" |
@@ -5113,14 +5114,14 @@ static void gk20a_gr_set_error_notifier(struct gk20a *g, | |||
5113 | nvgpu_rwsem_down_read(&tsg->ch_list_lock); | 5114 | nvgpu_rwsem_down_read(&tsg->ch_list_lock); |
5114 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { | 5115 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { |
5115 | if (gk20a_channel_get(ch_tsg)) { | 5116 | if (gk20a_channel_get(ch_tsg)) { |
5116 | gk20a_set_error_notifier(ch_tsg, | 5117 | nvgpu_set_error_notifier(ch_tsg, |
5117 | error_notifier); | 5118 | error_notifier); |
5118 | gk20a_channel_put(ch_tsg); | 5119 | gk20a_channel_put(ch_tsg); |
5119 | } | 5120 | } |
5120 | } | 5121 | } |
5121 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); | 5122 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); |
5122 | } else { | 5123 | } else { |
5123 | gk20a_set_error_notifier(ch, error_notifier); | 5124 | nvgpu_set_error_notifier(ch, error_notifier); |
5124 | } | 5125 | } |
5125 | } | 5126 | } |
5126 | } | 5127 | } |
@@ -5130,7 +5131,7 @@ static int gk20a_gr_handle_semaphore_timeout_pending(struct gk20a *g, | |||
5130 | { | 5131 | { |
5131 | gk20a_dbg_fn(""); | 5132 | gk20a_dbg_fn(""); |
5132 | gk20a_gr_set_error_notifier(g, isr_data, | 5133 | gk20a_gr_set_error_notifier(g, isr_data, |
5133 | NVGPU_CHANNEL_GR_SEMAPHORE_TIMEOUT); | 5134 | NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT); |
5134 | nvgpu_err(g, | 5135 | nvgpu_err(g, |
5135 | "gr semaphore timeout"); | 5136 | "gr semaphore timeout"); |
5136 | return -EINVAL; | 5137 | return -EINVAL; |
@@ -5141,7 +5142,7 @@ static int gk20a_gr_intr_illegal_notify_pending(struct gk20a *g, | |||
5141 | { | 5142 | { |
5142 | gk20a_dbg_fn(""); | 5143 | gk20a_dbg_fn(""); |
5143 | gk20a_gr_set_error_notifier(g, isr_data, | 5144 | gk20a_gr_set_error_notifier(g, isr_data, |
5144 | NVGPU_CHANNEL_GR_ILLEGAL_NOTIFY); | 5145 | NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY); |
5145 | /* This is an unrecoverable error, reset is needed */ | 5146 | /* This is an unrecoverable error, reset is needed */ |
5146 | nvgpu_err(g, | 5147 | nvgpu_err(g, |
5147 | "gr semaphore timeout"); | 5148 | "gr semaphore timeout"); |
@@ -5156,7 +5157,7 @@ static int gk20a_gr_handle_illegal_method(struct gk20a *g, | |||
5156 | isr_data->data_lo); | 5157 | isr_data->data_lo); |
5157 | if (ret) { | 5158 | if (ret) { |
5158 | gk20a_gr_set_error_notifier(g, isr_data, | 5159 | gk20a_gr_set_error_notifier(g, isr_data, |
5159 | NVGPU_CHANNEL_GR_ILLEGAL_NOTIFY); | 5160 | NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY); |
5160 | nvgpu_err(g, "invalid method class 0x%08x" | 5161 | nvgpu_err(g, "invalid method class 0x%08x" |
5161 | ", offset 0x%08x address 0x%08x", | 5162 | ", offset 0x%08x address 0x%08x", |
5162 | isr_data->class_num, isr_data->offset, isr_data->addr); | 5163 | isr_data->class_num, isr_data->offset, isr_data->addr); |
@@ -5169,7 +5170,7 @@ static int gk20a_gr_handle_illegal_class(struct gk20a *g, | |||
5169 | { | 5170 | { |
5170 | gk20a_dbg_fn(""); | 5171 | gk20a_dbg_fn(""); |
5171 | gk20a_gr_set_error_notifier(g, isr_data, | 5172 | gk20a_gr_set_error_notifier(g, isr_data, |
5172 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 5173 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
5173 | nvgpu_err(g, | 5174 | nvgpu_err(g, |
5174 | "invalid class 0x%08x, offset 0x%08x", | 5175 | "invalid class 0x%08x, offset 0x%08x", |
5175 | isr_data->class_num, isr_data->offset); | 5176 | isr_data->class_num, isr_data->offset); |
@@ -5193,7 +5194,7 @@ int gk20a_gr_handle_fecs_error(struct gk20a *g, struct channel_gk20a *ch, | |||
5193 | 5194 | ||
5194 | if (gr_fecs_intr & gr_fecs_host_int_status_umimp_firmware_method_f(1)) { | 5195 | if (gr_fecs_intr & gr_fecs_host_int_status_umimp_firmware_method_f(1)) { |
5195 | gk20a_gr_set_error_notifier(g, isr_data, | 5196 | gk20a_gr_set_error_notifier(g, isr_data, |
5196 | NVGPU_CHANNEL_FECS_ERR_UNIMP_FIRMWARE_METHOD); | 5197 | NVGPU_ERR_NOTIFIER_FECS_ERR_UNIMP_FIRMWARE_METHOD); |
5197 | nvgpu_err(g, | 5198 | nvgpu_err(g, |
5198 | "firmware method error 0x%08x for offset 0x%04x", | 5199 | "firmware method error 0x%08x for offset 0x%04x", |
5199 | gk20a_readl(g, gr_fecs_ctxsw_mailbox_r(6)), | 5200 | gk20a_readl(g, gr_fecs_ctxsw_mailbox_r(6)), |
@@ -5215,7 +5216,7 @@ static int gk20a_gr_handle_class_error(struct gk20a *g, | |||
5215 | gr_class_error = | 5216 | gr_class_error = |
5216 | gr_class_error_code_v(gk20a_readl(g, gr_class_error_r())); | 5217 | gr_class_error_code_v(gk20a_readl(g, gr_class_error_r())); |
5217 | gk20a_gr_set_error_notifier(g, isr_data, | 5218 | gk20a_gr_set_error_notifier(g, isr_data, |
5218 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 5219 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
5219 | nvgpu_err(g, "class error 0x%08x, offset 0x%08x," | 5220 | nvgpu_err(g, "class error 0x%08x, offset 0x%08x," |
5220 | "sub channel 0x%08x mme generated %d," | 5221 | "sub channel 0x%08x mme generated %d," |
5221 | " mme pc 0x%08xdata high %d priv status %d" | 5222 | " mme pc 0x%08xdata high %d priv status %d" |
@@ -5244,7 +5245,7 @@ static int gk20a_gr_handle_firmware_method(struct gk20a *g, | |||
5244 | gk20a_dbg_fn(""); | 5245 | gk20a_dbg_fn(""); |
5245 | 5246 | ||
5246 | gk20a_gr_set_error_notifier(g, isr_data, | 5247 | gk20a_gr_set_error_notifier(g, isr_data, |
5247 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 5248 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
5248 | nvgpu_err(g, | 5249 | nvgpu_err(g, |
5249 | "firmware method 0x%08x, offset 0x%08x for channel %u", | 5250 | "firmware method 0x%08x, offset 0x%08x for channel %u", |
5250 | isr_data->class_num, isr_data->offset, | 5251 | isr_data->class_num, isr_data->offset, |
@@ -6024,7 +6025,7 @@ int gk20a_gr_isr(struct gk20a *g) | |||
6024 | if (need_reset) { | 6025 | if (need_reset) { |
6025 | nvgpu_err(g, "set gr exception notifier"); | 6026 | nvgpu_err(g, "set gr exception notifier"); |
6026 | gk20a_gr_set_error_notifier(g, &isr_data, | 6027 | gk20a_gr_set_error_notifier(g, &isr_data, |
6027 | NVGPU_CHANNEL_GR_EXCEPTION); | 6028 | NVGPU_ERR_NOTIFIER_GR_EXCEPTION); |
6028 | } | 6029 | } |
6029 | } | 6030 | } |
6030 | 6031 | ||