gpu: nvgpu: Remove support for legacy mapping

Make NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL mandatory for all map
IOCTLs. We'll clean up the legacy kernel code in subsequent patches.

Remove support for NVGPU_AS_IOCTL_MAP_BUFFER. It has been superseded
by NVGPU_AS_IOCTL_MAP_BUFFER_EX.

Remove legacy definitions to nvgpu_map_buffer_args and the related
flags, and update the in-kernel map calls accordingly by switching to
the newer definitions.

Bug 1902982

Change-Id: Ie9a7f02b8d5d0ec7c3722c4481afab6d39b4fbd0
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560932
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3875ec5c..d4d6cd2d 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1738,7 +1738,7 @@ int gr_gk20a_update_hwpm_ctxsw_mode(struct gk20a *g,
                         pm_ctx->mem.gpu_va = nvgpu_gmmu_map(c->vm,
                                                         &pm_ctx->mem,
                                                         pm_ctx->mem.size,
-                                                        NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
+                                                        NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE,
                                                         gk20a_mem_flag_none, true,
                                                         pm_ctx->mem.aperture);
                         if (!pm_ctx->mem.gpu_va) {
@@ -2633,7 +2633,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
         }
 
         gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
-                                NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
+                                NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
                 goto clean_up;
@@ -2651,7 +2651,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
         }
 
         gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
-                                NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
+                                NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE,
                                 gk20a_mem_flag_none, false, mem->aperture);
         if (!gpu_va)
                 goto clean_up;
@@ -2669,7 +2669,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
         }
 
         gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
-                                NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
+                                NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
                 goto clean_up;
@@ -2736,7 +2736,7 @@ int gr_gk20a_alloc_gr_ctx(struct gk20a *g,
         gr_ctx->mem.gpu_va = nvgpu_gmmu_map(vm,
                                         &gr_ctx->mem,
                                         gr_ctx->mem.size,
-                                        NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_FALSE,
+                                        0, /* not GPU-cacheable */
                                         gk20a_mem_flag_none, true,
                                         gr_ctx->mem.aperture);
         if (!gr_ctx->mem.gpu_va)