diff options
| author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-19 10:14:28 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-22 10:33:43 -0400 |
| commit | ae04f394cf9a82a762a7152747a6bba5be6f5f53 (patch) | |
| tree | 001f8839b8b6b7fdef1ac3c5907b84c72488ddbe /drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |
| parent | f85f21d1a5eeb10e764b820bba4452ee03f9c52a (diff) | |
gpu: nvgpu: add HAL to set ppriv timeouts
Add new HAL gops.bus.set_ppriv_timeout_settings() to set platform specific
ppriv timeouts
Set this HAL for all supported GPUs for now
Jira NVGPUT-35
Change-Id: I88b438a7bf381d0216e0947a16cd267461d0e8d7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699314
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index ed1f9af9..51bb2551 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
| @@ -53,9 +53,6 @@ | |||
| 53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
| 54 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> | 54 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> |
| 55 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> | 55 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> |
| 56 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | ||
| 57 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | ||
| 58 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | ||
| 59 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> | 56 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> |
| 60 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | 57 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> |
| 61 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> | 58 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> |
| @@ -4489,12 +4486,8 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) | |||
| 4489 | 4486 | ||
| 4490 | gr_gk20a_zcull_init_hw(g, gr); | 4487 | gr_gk20a_zcull_init_hw(g, gr); |
| 4491 | 4488 | ||
| 4492 | /* Bug 1340570: increase the clock timeout to avoid potential | 4489 | if (g->ops.bus.set_ppriv_timeout_settings) |
| 4493 | * operation failure at high gpcclk rate. Default values are 0x400. | 4490 | g->ops.bus.set_ppriv_timeout_settings(g); |
| 4494 | */ | ||
| 4495 | gk20a_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | ||
| 4496 | gk20a_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | ||
| 4497 | gk20a_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | ||
| 4498 | 4491 | ||
| 4499 | /* enable fifo access */ | 4492 | /* enable fifo access */ |
| 4500 | gk20a_writel(g, gr_gpfifo_ctl_r(), | 4493 | gk20a_writel(g, gr_gpfifo_ctl_r(), |