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authorKevin Huang <kevinh@nvidia.com>2014-04-09 17:47:03 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:51 -0400
commit932377f12a4d928ea1e4728f242abe3a1f07eaa6 (patch)
treee9b73e9f2d01180b21731b9cd6bc3832d7df28b8 /drivers/gpu/nvgpu/gk20a/gr_gk20a.c
parentcb93f2518526281577fc8f296c979f162f752dc0 (diff)
gpu: nvpug: add hal func get_gpc_tpc_mask
Retrieve which TPC is floorswept. Bug 1450798 Change-Id: I3ea60703695448c68cd3435f443b280d5b2f0995 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/403876 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 8d35dd80..3298a383 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1347,6 +1347,12 @@ static int gr_gk20a_setup_alpha_beta_tables(struct gk20a *g,
1347 return 0; 1347 return 0;
1348} 1348}
1349 1349
1350static u32 gr_gk20a_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
1351{
1352 /* One TPC for gk20a */
1353 return 0x1;
1354}
1355
1350static int gr_gk20a_ctx_state_floorsweep(struct gk20a *g) 1356static int gr_gk20a_ctx_state_floorsweep(struct gk20a *g)
1351{ 1357{
1352 struct gr_gk20a *gr = &g->gr; 1358 struct gr_gk20a *gr = &g->gr;
@@ -3071,6 +3077,7 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
3071 } 3077 }
3072 3078
3073 gr->gpc_tpc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 3079 gr->gpc_tpc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
3080 gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
3074 gr->gpc_zcb_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 3081 gr->gpc_zcb_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
3075 gr->gpc_ppc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 3082 gr->gpc_ppc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
3076 gr->pes_tpc_count[0] = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 3083 gr->pes_tpc_count[0] = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
@@ -3100,6 +3107,11 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
3100 3107
3101 gr->gpc_ppc_count[gpc_index] = gr->pe_count_per_gpc; 3108 gr->gpc_ppc_count[gpc_index] = gr->pe_count_per_gpc;
3102 gr->ppc_count += gr->gpc_ppc_count[gpc_index]; 3109 gr->ppc_count += gr->gpc_ppc_count[gpc_index];
3110
3111 if (g->ops.gr.get_gpc_tpc_mask)
3112 gr->gpc_tpc_mask[gpc_index] =
3113 g->ops.gr.get_gpc_tpc_mask(g, gpc_index);
3114
3103 for (pes_index = 0; pes_index < gr->pe_count_per_gpc; pes_index++) { 3115 for (pes_index = 0; pes_index < gr->pe_count_per_gpc; pes_index++) {
3104 3116
3105 tmp = gk20a_readl(g, 3117 tmp = gk20a_readl(g,
@@ -6995,4 +7007,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
6995 gops->gr.setup_alpha_beta_tables = gr_gk20a_setup_alpha_beta_tables; 7007 gops->gr.setup_alpha_beta_tables = gr_gk20a_setup_alpha_beta_tables;
6996 gops->gr.falcon_load_ucode = gr_gk20a_load_ctxsw_ucode_segments; 7008 gops->gr.falcon_load_ucode = gr_gk20a_load_ctxsw_ucode_segments;
6997 gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode; 7009 gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode;
7010 gops->gr.get_gpc_tpc_mask = gr_gk20a_get_gpc_tpc_mask;
6998} 7011}