summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
diff options
context:
space:
mode:
authorSeema Khowala <seemaj@nvidia.com>2017-07-17 18:39:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-19 02:42:02 -0400
commit92d476bf279f80e896fd7247a267ae2202b91550 (patch)
treea3d486f11587dbfe5dc3204a2dcf14f9c0f9d0c2 /drivers/gpu/nvgpu/gk20a/gr_gk20a.c
parentf8dbb60882ebdb021f285b99270296fe76e4f2f4 (diff)
gpu: nvgpu: ctxheader changes for t19x
JIRA GPUT19X-49 Bug 200311674 Bug 1960226 Change-Id: I913e0dd16c51db3f92cb44abaf3f3afa1ce46c0e Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1522444 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 838fe494..2aec662c 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -680,9 +680,20 @@ int gr_gk20a_ctx_patch_write_begin(struct gk20a *g,
680void gr_gk20a_ctx_patch_write_end(struct gk20a *g, 680void gr_gk20a_ctx_patch_write_end(struct gk20a *g,
681 struct channel_ctx_gk20a *ch_ctx) 681 struct channel_ctx_gk20a *ch_ctx)
682{ 682{
683 struct ctx_header_desc *ctx = &ch_ctx->ctx_header;
684 struct nvgpu_mem *ctxheader = &ctx->mem;
685
683 nvgpu_mem_end(g, &ch_ctx->patch_ctx.mem); 686 nvgpu_mem_end(g, &ch_ctx->patch_ctx.mem);
687
684 /* Write context count to context image if it is mapped */ 688 /* Write context count to context image if it is mapped */
685 if (ch_ctx->gr_ctx->mem.cpu_va) { 689 if (ctxheader->gpu_va) {
690
691 if (ctxheader->cpu_va)
692 nvgpu_mem_wr(g, ctxheader,
693 ctxsw_prog_main_image_patch_count_o(),
694 ch_ctx->patch_ctx.data_count);
695
696 } else if (ch_ctx->gr_ctx->mem.cpu_va) {
686 nvgpu_mem_wr(g, &ch_ctx->gr_ctx->mem, 697 nvgpu_mem_wr(g, &ch_ctx->gr_ctx->mem,
687 ctxsw_prog_main_image_patch_count_o(), 698 ctxsw_prog_main_image_patch_count_o(),
688 ch_ctx->patch_ctx.data_count); 699 ch_ctx->patch_ctx.data_count);