gpu: nvgpu: ioctl for flushing GPU L2

CUDA devtools need to be able to flush the GPU's cache
in a sideband fashion and so cannot use methods. This
change implements an nvgpu_gpu_ioctl to flush and
optionally invalidate the GPU's L2 cache and flush fb.

Change-Id: Ib06a0bc8d8880ffbfe4b056518cc3c3df0cc4988
Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com>
Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com>
Reviewed-on: http://git-master/r/671809
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3115b5c3..ab3f18ba 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1502,7 +1502,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
         ctx_header_words =  roundup(ctx_header_bytes, sizeof(u32));
         ctx_header_words >>= 2;
 
-        gk20a_mm_l2_flush(g, true);
+        g->ops.mm.l2_flush(g, true);
 
         for (i = 0; i < ctx_header_words; i++) {
                 data = gk20a_mem_rd32(ctx_ptr, i);
@@ -1565,7 +1565,7 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
 
         /* Channel gr_ctx buffer is gpu cacheable.
            Flush and invalidate before cpu update. */
-        gk20a_mm_l2_flush(g, true);
+        g->ops.mm.l2_flush(g, true);
 
         ctx_ptr = vmap(ch_ctx->gr_ctx->pages,
                         PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT,
@@ -1605,7 +1605,7 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
 
         /* Channel gr_ctx buffer is gpu cacheable.
            Flush and invalidate before cpu update. */
-        gk20a_mm_l2_flush(g, true);
+        g->ops.mm.l2_flush(g, true);
 
         ctx_ptr = vmap(ch_ctx->gr_ctx->pages,
                         PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT,
@@ -7003,7 +7003,7 @@ int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
                 goto cleanup;
         }
 
-        gk20a_mm_l2_flush(g, true);
+        g->ops.mm.l2_flush(g, true);
 
         /* write to appropriate place in context image,
          * first have to figure out where that really is */