gpu: nvgpu: add enable_exceptions gr ops

This is needed to enable chip specific gr exceptions

JIRA GPUT19X-75

Change-Id: I5ca8d0e51d00947c3ab1675bb6331207def433a4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1474851
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 13 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index f9c76ae5..2b5d809f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4670,6 +4670,16 @@ static int gr_gk20a_zcull_init_hw(struct gk20a *g, struct gr_gk20a *gr)
         return 0;
 }
 
+void gk20a_gr_enable_exceptions(struct gk20a *g)
+{
+        gk20a_writel(g, gr_exception_r(), 0xFFFFFFFF);
+        gk20a_writel(g, gr_exception_en_r(), 0xFFFFFFFF);
+        gk20a_writel(g, gr_exception1_r(), 0xFFFFFFFF);
+        gk20a_writel(g, gr_exception1_en_r(), 0xFFFFFFFF);
+        gk20a_writel(g, gr_exception2_r(), 0xFFFFFFFF);
+        gk20a_writel(g, gr_exception2_en_r(), 0xFFFFFFFF);
+}
+
 void gk20a_gr_enable_gpc_exceptions(struct gk20a *g)
 {
         struct gr_gk20a *gr = &g->gr;
@@ -4813,13 +4823,8 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g)
         /* TBD: ECC for L1/SM */
         /* TBD: enable per BE exceptions */
 
-        /* reset and enable all exceptions */
-        gk20a_writel(g, gr_exception_r(), 0xFFFFFFFF);
-        gk20a_writel(g, gr_exception_en_r(), 0xFFFFFFFF);
-        gk20a_writel(g, gr_exception1_r(), 0xFFFFFFFF);
-        gk20a_writel(g, gr_exception1_en_r(), 0xFFFFFFFF);
-        gk20a_writel(g, gr_exception2_r(), 0xFFFFFFFF);
-        gk20a_writel(g, gr_exception2_en_r(), 0xFFFFFFFF);
+        /* reset and enable exceptions */
+        g->ops.gr.enable_exceptions(g);
 
         gr_gk20a_load_zbc_table(g, gr);
 
@@ -9557,6 +9562,7 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
         gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception;
         gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception;
         gops->gr.enable_gpc_exceptions = gk20a_gr_enable_gpc_exceptions;
+        gops->gr.enable_exceptions = gk20a_gr_enable_exceptions;
         gops->gr.get_lrf_tex_ltc_dram_override = NULL;
         gops->gr.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode;
         gops->gr.update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode;