gpu: nvgpu: remove dependency on linux header for regops_gk20a*

This patch removes the dependency on the header file "uapi/linux/nvgpu.h"
for regops_gk20a.c. The original structure and definitions in the
uapi/linux/nvgpu.h is maintained for userspace libnvrm_gpu.h. The
following changes are made in this patch.

1) Defined common versions of the NVGPU_DBG_GPU_REG_OP* definitions inside
regops_gk20a.h.
2) Defined common version of struct nvgpu_dbg_gpu_reg_op inside
regops_gk20a.h naming it struct nvgpu_dbg_reg_op.
3) Constructed APIs to convert the NVGPU_DBG_GPU_REG_OP* definitions from
linux versions to common and vice versa.
4) Constructed APIs to convert from struct nvgpu_dbg_gpu_reg_op to
struct nvgpu_dbg_reg_op and vice versa.
5) The ioctl handler nvgpu_ioctl_channel_reg_ops first copies from
userspace into a local storage based on struct nvgpu_dbg_gpu_reg_op which
is copied into the struct nvgpu_dbg_reg_op using the APIs above and
after executing the regops handler passes the data back into userspace
by copying back data from struct nvgpu_dbg_reg_op to struct
nvgpu_dbg_gpu_reg_opi.

JIRA NVGPU-417

Change-Id: I23bad48d2967a629a6308c7484f3741a89db6537
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1596972
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 03e1d567..82695e44 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -7749,7 +7749,7 @@ bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch)
 }
 
 int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
-                            struct nvgpu_dbg_gpu_reg_op *ctx_ops, u32 num_ops,
+                            struct nvgpu_dbg_reg_op *ctx_ops, u32 num_ops,
                             u32 num_ctx_wr_ops, u32 num_ctx_rd_ops,
                             bool ch_is_curr_ctx)
 {
@@ -7990,7 +7990,7 @@ int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
 }
 
 int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
-                          struct nvgpu_dbg_gpu_reg_op *ctx_ops, u32 num_ops,
+                          struct nvgpu_dbg_reg_op *ctx_ops, u32 num_ops,
                           u32 num_ctx_wr_ops, u32 num_ctx_rd_ops)
 {
         struct gk20a *g = ch->g;
@@ -8279,7 +8279,7 @@ void gk20a_gr_resume_all_sms(struct gk20a *g)
 int gr_gk20a_set_sm_debug_mode(struct gk20a *g,
         struct channel_gk20a *ch, u64 sms, bool enable)
 {
-        struct nvgpu_dbg_gpu_reg_op *ops;
+        struct nvgpu_dbg_reg_op *ops;
         unsigned int i = 0, sm_id;
         int err;
         u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
@@ -8453,7 +8453,7 @@ int gr_gk20a_inval_icache(struct gk20a *g, struct channel_gk20a *ch)
 {
         int err = 0;
         u32     cache_ctrl, regval;
-        struct nvgpu_dbg_gpu_reg_op ops;
+        struct nvgpu_dbg_reg_op ops;
 
         ops.op     = REGOP(READ_32);
         ops.type   = REGOP(TYPE_GR_CTX);