gpu: nvgpu: wait for gr.initialized before changing cg/pg

set gr.initialized to false in the beginning of gk20a_gr_reset() and
set it to true at the end of successful execution of gk20a_gr_reset.

Use gk20a_gr_wait_initialized() to enable/disable cg/pg
functions to make sure engine is out of reset and initialized.

Bug 2092051
Bug 2429295
Bug 2484211
Bug 1890287

Change-Id: Ic7b0b71382c6d852a625c603dad8609c43b7f20f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from 7e2f124fd12caf37172f12da8de65093622941a5 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2111038
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 11 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 788ebf45..4f8006b2 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4679,7 +4679,7 @@ static int gk20a_init_gr_prepare(struct gk20a *g)
         nvgpu_cg_init_gr_load_gating_prod(g);
 
         /* Disable elcg until it gets enabled later in the init*/
-        nvgpu_cg_elcg_disable(g);
+        nvgpu_cg_elcg_disable_no_wait(g);
 
         /* enable fifo access */
         gk20a_writel(g, gr_gpfifo_ctl_r(),
@@ -4963,6 +4963,8 @@ int gk20a_init_gr_support(struct gk20a *g)
 
         nvgpu_log_fn(g, " ");
 
+        g->gr.initialized = false;
+
         /* this is required before gr_gk20a_init_ctx_state */
         err = nvgpu_mutex_init(&g->gr.fecs_mutex);
         if (err != 0) {
@@ -4999,7 +5001,7 @@ int gk20a_init_gr_support(struct gk20a *g)
                 }
         }
 
-        nvgpu_cg_elcg_enable(g);
+        nvgpu_cg_elcg_enable_no_wait(g);
         /* GR is inialized, signal possible waiters */
         g->gr.initialized = true;
         nvgpu_cond_signal(&g->gr.init_wq);
@@ -5091,6 +5093,8 @@ int gk20a_gr_reset(struct gk20a *g)
         int err;
         u32 size;
 
+        g->gr.initialized = false;
+
         nvgpu_mutex_acquire(&g->gr.fecs_mutex);
 
         err = gk20a_enable_gr_hw(g);
@@ -5143,7 +5147,11 @@ int gk20a_gr_reset(struct gk20a *g)
         }
 
         nvgpu_cg_init_gr_load_gating_prod(g);
-        nvgpu_cg_elcg_enable(g);
+        nvgpu_cg_elcg_enable_no_wait(g);
+
+        /* GR is inialized, signal possible waiters */
+        g->gr.initialized = true;
+        nvgpu_cond_signal(&g->gr.init_wq);
 
         return err;
 }