gpu: nvgpu: gk20a: FECS HALT method

FECS halt method is used to do graceful FECS shutdown.

Bug 1551865

Change-Id: Iec8590e86cb09f9b54c36f85859208fc8650f6a6
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/682459
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 15 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 75775d57..8869f4c4 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -536,6 +536,21 @@ int gr_gk20a_enable_ctxsw(struct gk20a *g)
                         gr_fecs_method_push_adr_start_ctxsw_v(), NULL);
 }
 
+int gr_gk20a_halt_pipe(struct gk20a *g)
+{
+        return gr_gk20a_submit_fecs_method_op(g,
+              (struct fecs_method_op_gk20a) {
+                      .method.addr =
+                                gr_fecs_method_push_adr_halt_pipeline_v(),
+                      .method.data = ~0,
+                      .mailbox = { .id   = 1, /*sideband?*/
+                                .data = ~0, .clr = ~0, .ret = 0,
+                                .ok   = gr_fecs_ctxsw_mailbox_value_pass_v(),
+                                .fail = gr_fecs_ctxsw_mailbox_value_fail_v(), },
+                      .cond.ok = GR_IS_UCODE_OP_EQUAL,
+                      .cond.fail = GR_IS_UCODE_OP_EQUAL });
+}
+
 
 static int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va)
 {