gpu: nvgpu: add support to get unicast addresses on volta

We have new broadcast registers on Volta, and we need to generate correct
unicast addresses for them so that we can write those registers to context image

Add new GR HAL create_priv_addr_table() to do this conversion
Set gr_gk20a_create_priv_addr_table() for older chips
Set gr_gv11b_create_priv_addr_table() for Volta

gr_gv11b_create_priv_addr_table() will use the broadcast flags and then generate
appriate list of unicast register for each broadcast register

Bug 200398811
Jira NVGPU-556

Change-Id: Id53a9e56106d200fe560ffc93394cc0e976f455f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1690027
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3912a1df..04d00e55 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -6325,7 +6325,7 @@ int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr,
         return -EINVAL;
 }
 
-static int gr_gk20a_split_ppc_broadcast_addr(struct gk20a *g, u32 addr,
+int gr_gk20a_split_ppc_broadcast_addr(struct gk20a *g, u32 addr,
                                       u32 gpc_num,
                                       u32 *priv_addr_table, u32 *t)
 {
@@ -6347,7 +6347,7 @@ static int gr_gk20a_split_ppc_broadcast_addr(struct gk20a *g, u32 addr,
  * GPC/TPC addresses.  The addresses generated by this function can be
  * successfully processed by gr_gk20a_find_priv_offset_in_buffer
  */
-static int gr_gk20a_create_priv_addr_table(struct gk20a *g,
+int gr_gk20a_create_priv_addr_table(struct gk20a *g,
                                            u32 addr,
                                            u32 *priv_addr_table,
                                            u32 *num_registers)
@@ -6494,7 +6494,8 @@ int gr_gk20a_get_ctx_buffer_offsets(struct gk20a *g,
         memset(offset_addrs, 0, sizeof(u32) * max_offsets);
         *num_offsets = 0;
 
-        gr_gk20a_create_priv_addr_table(g, addr, &priv_registers[0], &num_registers);
+        g->ops.gr.create_priv_addr_table(g, addr, &priv_registers[0],
+                        &num_registers);
 
         if ((max_offsets > 1) && (num_registers > max_offsets)) {
                 gk20a_dbg_fn("max_offsets = %d, num_registers = %d",
@@ -6571,7 +6572,8 @@ int gr_gk20a_get_pm_ctx_buffer_offsets(struct gk20a *g,
         memset(offset_addrs, 0, sizeof(u32) * max_offsets);
         *num_offsets = 0;
 
-        gr_gk20a_create_priv_addr_table(g, addr, priv_registers, &num_registers);
+        g->ops.gr.create_priv_addr_table(g, addr, priv_registers,
+                        &num_registers);
 
         if ((max_offsets > 1) && (num_registers > max_offsets)) {
                 err = -EINVAL;