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author | Jonathan McCaffrey <jmccaffrey@nvidia.com> | 2017-08-18 02:51:03 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-26 18:46:01 -0400 |
commit | 00e52529a8431a6520b8e1bbcbfa44b4cc86be80 (patch) | |
tree | f88b91784e966e9c9bbbffe1d127a1d73826d1c2 /drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |
parent | e49d93a960f8995affeb4541941eb7f16d04eafd (diff) |
gpu: gp10b: add gfxp_wfi_timeout sysfs node
Add a sysfs node to allow root user to set PRI_FE_GFXP_WFI_TIMEOUT, for gp10b
only, in units of sysclk cycles. Store the set value in a variable, and write
the set value to register after GPU is un-railgated.
NV_PGRAPH_PRI_FE_GFXP_WFI_TIMEOUT is engine_reset after Bug 1623341.
Change default value to be specified in cycles, rather than time. This value
is almost the current value in cycles calculated each boot.
Bug 1932782
Change-Id: I0a4207e637cd1413a1be95abe2bcce3adccf76fa
Reviewed-on: https://git-master.nvidia.com/r/1540939
Signed-off-by: Jonathan McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580999
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 2fd6f72c..71fe44a3 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -78,6 +78,7 @@ | |||
78 | #define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 | 78 | #define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 |
79 | #define FECS_ARB_CMD_TIMEOUT_MAX 40 | 79 | #define FECS_ARB_CMD_TIMEOUT_MAX 40 |
80 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 | 80 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 |
81 | #define GFXP_WFI_TIMEOUT_COUNT_DEFAULT 100000 | ||
81 | 82 | ||
82 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); | 83 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); |
83 | 84 | ||
@@ -4841,6 +4842,8 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g) | |||
4841 | if (g->ops.gr.init_czf_bypass) | 4842 | if (g->ops.gr.init_czf_bypass) |
4842 | g->ops.gr.init_czf_bypass(g); | 4843 | g->ops.gr.init_czf_bypass(g); |
4843 | 4844 | ||
4845 | gr->gfxp_wfi_timeout_count = GFXP_WFI_TIMEOUT_COUNT_DEFAULT; | ||
4846 | |||
4844 | nvgpu_mutex_init(&gr->ctx_mutex); | 4847 | nvgpu_mutex_init(&gr->ctx_mutex); |
4845 | nvgpu_spinlock_init(&gr->ch_tlb_lock); | 4848 | nvgpu_spinlock_init(&gr->ch_tlb_lock); |
4846 | 4849 | ||