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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-06-27 17:27:11 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-07-07 07:14:05 -0400
commit3da46822fc124fa83288d6e282c8f0ec4d727a5c (patch)
tree83ec57fbbfda9ca837df34df4a74b7d97f32f50f /drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
parent6a7b85527e96f64e913137d79b66c90ff62124fe (diff)
gpu: nvgpu: Remove unused code in simulation paths
Remove code that was compiled out or hard coded not to be ever invoked. Coverity ID 24463 Change-Id: Ia4a68bbe43eaebd9f3de1df1318095c014b9e9d0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1172046 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c31
1 files changed, 5 insertions, 26 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
index 12bba1fd..9430ce7b 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
@@ -26,9 +26,6 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr)
26{ 26{
27 int err = 0; 27 int err = 0;
28 u32 i, temp; 28 u32 i, temp;
29 char *size_path = NULL;
30 char *reg_path = NULL;
31 char *value_path = NULL;
32 29
33 gk20a_dbg(gpu_dbg_fn | gpu_dbg_info, 30 gk20a_dbg(gpu_dbg_fn | gpu_dbg_info,
34 "querying grctx info from chiplib"); 31 "querying grctx info from chiplib");
@@ -54,35 +51,15 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr)
54 gk20a_sim_esc_readl(g, "GRCTX_SW_CTX_LOAD_SIZE", 0, 51 gk20a_sim_esc_readl(g, "GRCTX_SW_CTX_LOAD_SIZE", 0,
55 &g->gr.ctx_vars.sw_ctx_load.count); 52 &g->gr.ctx_vars.sw_ctx_load.count);
56 53
57 switch (0) { /*g->gr.ctx_vars.reg_init_override)*/
58#if 0
59 case NV_REG_STR_RM_GR_REG_INIT_OVERRIDE_PROD_DIFF:
60 sizePath = "GRCTX_NONCTXSW_PROD_DIFF_REG_SIZE";
61 regPath = "GRCTX_NONCTXSW_PROD_DIFF_REG:REG";
62 valuePath = "GRCTX_NONCTXSW_PROD_DIFF_REG:VALUE";
63 break;
64#endif
65 default:
66 size_path = "GRCTX_NONCTXSW_REG_SIZE";
67 reg_path = "GRCTX_NONCTXSW_REG:REG";
68 value_path = "GRCTX_NONCTXSW_REG:VALUE";
69 break;
70 }
71 54
72 gk20a_sim_esc_readl(g, size_path, 0, 55 gk20a_sim_esc_readl(g, "GRCTX_NONCTXSW_REG_SIZE", 0,
73 &g->gr.ctx_vars.sw_non_ctx_load.count); 56 &g->gr.ctx_vars.sw_non_ctx_load.count);
74
75 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_SYS_COUNT", 0, 57 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_SYS_COUNT", 0,
76 &g->gr.ctx_vars.ctxsw_regs.sys.count); 58 &g->gr.ctx_vars.ctxsw_regs.sys.count);
77 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_GPC_COUNT", 0, 59 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_GPC_COUNT", 0,
78 &g->gr.ctx_vars.ctxsw_regs.gpc.count); 60 &g->gr.ctx_vars.ctxsw_regs.gpc.count);
79 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_TPC_COUNT", 0, 61 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_TPC_COUNT", 0,
80 &g->gr.ctx_vars.ctxsw_regs.tpc.count); 62 &g->gr.ctx_vars.ctxsw_regs.tpc.count);
81#if 0
82 /* looks to be unused, actually chokes the sim */
83 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_PPC_COUNT", 0,
84 &g->gr.ctx_vars.ctxsw_regs.ppc.count);
85#endif
86 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_ZCULL_GPC_COUNT", 0, 63 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_ZCULL_GPC_COUNT", 0,
87 &g->gr.ctx_vars.ctxsw_regs.zcull_gpc.count); 64 &g->gr.ctx_vars.ctxsw_regs.zcull_gpc.count);
88 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_PM_SYS_COUNT", 0, 65 gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_PM_SYS_COUNT", 0,
@@ -156,8 +133,10 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr)
156 133
157 for (i = 0; i < g->gr.ctx_vars.sw_non_ctx_load.count; i++) { 134 for (i = 0; i < g->gr.ctx_vars.sw_non_ctx_load.count; i++) {
158 struct av_gk20a *l = g->gr.ctx_vars.sw_non_ctx_load.l; 135 struct av_gk20a *l = g->gr.ctx_vars.sw_non_ctx_load.l;
159 gk20a_sim_esc_readl(g, reg_path, i, &l[i].addr); 136 gk20a_sim_esc_readl(g, "GRCTX_NONCTXSW_REG:REG",
160 gk20a_sim_esc_readl(g, value_path, i, &l[i].value); 137 i, &l[i].addr);
138 gk20a_sim_esc_readl(g, "GRCTX_NONCTXSW_REG:VALUE",
139 i, &l[i].value);
161 } 140 }
162 141
163 for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) { 142 for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) {