gpu: nvgpu: gk20a: Fix MISRA 15.6 violations

This fixes errors due to single statement loop bodies
without braces, which is part of Rule 15.6 of MISRA.
This patch covers in gpu/nvgpu/gk20a/

JIRA NVGPU-989

Change-Id: I2f422e9bc2b03229f4d2c3198613169ce5e7f3ee
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1791019
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 8 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
index 80252aaa..ce65c777 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c
@@ -154,21 +154,25 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr)
                 goto fail;
         }
 
-        for (i = 0; i < g->gr.ctx_vars.ucode.fecs.inst.count; i++)
+        for (i = 0; i < g->gr.ctx_vars.ucode.fecs.inst.count; i++) {
                 g->sim->esc_readl(g, "GRCTX_UCODE_INST_FECS",
                                     i, &g->gr.ctx_vars.ucode.fecs.inst.l[i]);
+        }
 
-        for (i = 0; i < g->gr.ctx_vars.ucode.fecs.data.count; i++)
+        for (i = 0; i < g->gr.ctx_vars.ucode.fecs.data.count; i++) {
                 g->sim->esc_readl(g, "GRCTX_UCODE_DATA_FECS",
                                     i, &g->gr.ctx_vars.ucode.fecs.data.l[i]);
+        }
 
-        for (i = 0; i < g->gr.ctx_vars.ucode.gpccs.inst.count; i++)
+        for (i = 0; i < g->gr.ctx_vars.ucode.gpccs.inst.count; i++) {
                 g->sim->esc_readl(g, "GRCTX_UCODE_INST_GPCCS",
                                     i, &g->gr.ctx_vars.ucode.gpccs.inst.l[i]);
+        }
 
-        for (i = 0; i < g->gr.ctx_vars.ucode.gpccs.data.count; i++)
+        for (i = 0; i < g->gr.ctx_vars.ucode.gpccs.data.count; i++) {
                 g->sim->esc_readl(g, "GRCTX_UCODE_DATA_GPCCS",
                                     i, &g->gr.ctx_vars.ucode.gpccs.data.l[i]);
+        }
 
         for (i = 0; i < g->gr.ctx_vars.sw_bundle_init.count; i++) {
                 struct av_gk20a *l = g->gr.ctx_vars.sw_bundle_init.l;