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authorArto Merilainen <amerilainen@nvidia.com>2014-03-19 03:38:25 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:08:53 -0400
commita9785995d5f22aaeb659285f8aeb64d8b56982e0 (patch)
treecc75f75bcf43db316a002a7a240b81f299bf6d7f /drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
parent61efaf843c22b85424036ec98015121c08f5f16c (diff)
gpu: nvgpu: Add NVIDIA GPU Driver
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h149
1 files changed, 149 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
new file mode 100644
index 00000000..909a166a
--- /dev/null
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
@@ -0,0 +1,149 @@
1/*
2 * GK20A Graphics Context
3 *
4 * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18#ifndef __GR_CTX_GK20A_H__
19#define __GR_CTX_GK20A_H__
20
21
22/* production netlist, one and only one from below */
23/*#undef GK20A_NETLIST_IMAGE_FW_NAME*/
24#define GK20A_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_B
25/* emulation netlists, match majorV with HW */
26#define GK20A_NETLIST_IMAGE_A "NETA_img.bin"
27#define GK20A_NETLIST_IMAGE_B "NETB_img.bin"
28#define GK20A_NETLIST_IMAGE_C "NETC_img.bin"
29#define GK20A_NETLIST_IMAGE_D "NETD_img.bin"
30
31union __max_name {
32#ifdef GK20A_NETLIST_IMAGE_A
33 char __name_a[sizeof(GK20A_NETLIST_IMAGE_A)];
34#endif
35#ifdef GK20A_NETLIST_IMAGE_B
36 char __name_b[sizeof(GK20A_NETLIST_IMAGE_B)];
37#endif
38#ifdef GK20A_NETLIST_IMAGE_C
39 char __name_c[sizeof(GK20A_NETLIST_IMAGE_C)];
40#endif
41#ifdef GK20A_NETLIST_IMAGE_D
42 char __name_d[sizeof(GK20A_NETLIST_IMAGE_D)];
43#endif
44};
45
46#define MAX_NETLIST_NAME sizeof(union __max_name)
47
48/* index for emulation netlists */
49#define NETLIST_FINAL -1
50#define NETLIST_SLOT_A 0
51#define NETLIST_SLOT_B 1
52#define NETLIST_SLOT_C 2
53#define NETLIST_SLOT_D 3
54#define MAX_NETLIST 4
55
56/* netlist regions */
57#define NETLIST_REGIONID_FECS_UCODE_DATA 0
58#define NETLIST_REGIONID_FECS_UCODE_INST 1
59#define NETLIST_REGIONID_GPCCS_UCODE_DATA 2
60#define NETLIST_REGIONID_GPCCS_UCODE_INST 3
61#define NETLIST_REGIONID_SW_BUNDLE_INIT 4
62#define NETLIST_REGIONID_SW_CTX_LOAD 5
63#define NETLIST_REGIONID_SW_NON_CTX_LOAD 6
64#define NETLIST_REGIONID_SW_METHOD_INIT 7
65#define NETLIST_REGIONID_CTXREG_SYS 8
66#define NETLIST_REGIONID_CTXREG_GPC 9
67#define NETLIST_REGIONID_CTXREG_TPC 10
68#define NETLIST_REGIONID_CTXREG_ZCULL_GPC 11
69#define NETLIST_REGIONID_CTXREG_PM_SYS 12
70#define NETLIST_REGIONID_CTXREG_PM_GPC 13
71#define NETLIST_REGIONID_CTXREG_PM_TPC 14
72#define NETLIST_REGIONID_MAJORV 15
73#define NETLIST_REGIONID_BUFFER_SIZE 16
74#define NETLIST_REGIONID_CTXSW_REG_BASE_INDEX 17
75#define NETLIST_REGIONID_NETLIST_NUM 18
76#define NETLIST_REGIONID_CTXREG_PPC 19
77#define NETLIST_REGIONID_CTXREG_PMPPC 20
78
79struct netlist_region {
80 u32 region_id;
81 u32 data_size;
82 u32 data_offset;
83};
84
85struct netlist_image_header {
86 u32 version;
87 u32 regions;
88};
89
90struct netlist_image {
91 struct netlist_image_header header;
92 struct netlist_region regions[1];
93};
94
95struct av_gk20a {
96 u32 addr;
97 u32 value;
98};
99struct aiv_gk20a {
100 u32 addr;
101 u32 index;
102 u32 value;
103};
104struct aiv_list_gk20a {
105 struct aiv_gk20a *l;
106 u32 count;
107};
108struct av_list_gk20a {
109 struct av_gk20a *l;
110 u32 count;
111};
112struct u32_list_gk20a {
113 u32 *l;
114 u32 count;
115};
116
117static inline
118struct av_gk20a *alloc_av_list_gk20a(struct av_list_gk20a *avl)
119{
120 avl->l = kzalloc(avl->count * sizeof(*avl->l), GFP_KERNEL);
121 return avl->l;
122}
123
124static inline
125struct aiv_gk20a *alloc_aiv_list_gk20a(struct aiv_list_gk20a *aivl)
126{
127 aivl->l = kzalloc(aivl->count * sizeof(*aivl->l), GFP_KERNEL);
128 return aivl->l;
129}
130
131static inline
132u32 *alloc_u32_list_gk20a(struct u32_list_gk20a *u32l)
133{
134 u32l->l = kzalloc(u32l->count * sizeof(*u32l->l), GFP_KERNEL);
135 return u32l->l;
136}
137
138struct gr_ucode_gk20a {
139 struct {
140 struct u32_list_gk20a inst;
141 struct u32_list_gk20a data;
142 } gpccs, fecs;
143};
144
145/* main entry for grctx loading */
146int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr);
147int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr);
148
149#endif /*__GR_CTX_GK20A_H__*/